LTC4156 Dual-Input Power Manager/ 3.5A LiFePO4 Battery Charger with I2C Control and USB OTG FEATURES n n n n n n n n n n n n DESCRIPTION High Efficiency Charger Capable of 3.
LTC4156 TABLE OF CONTENTS Features............................................................................................................................. 1 Applications........................................................................................................................ 1 Typical Application ................................................................................................................ 1 Description.....................................................................
LTC4156 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2) VBUS VBUS VBUS SW SW TOP VIEW SCL VBUS (Transient) t < 1ms, Duty Cycle < 1%.... –0.3V to 7V VBUS (Steady State), BATSNS, IRQ, NTC....... –0.3V to 6V DVCC, SDA, SCL (Note 3).........................–0.3V to VMAX IWALLSNS, IUSBSNS................................................ ±20mA INTCBIAS, IIRQ...........................................................10mA ISW, IVOUT, ICHGSNS (Both Pins in Each Case)...............
LTC4156 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA ≈ TJ = 25°C (Note 2). VBUS = 5V, BATSNS = 3.3V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Switching Battery Charger VBUS Input Supply Voltage VBUSREG Undervoltage Current Reduction Input Undervoltage Current Limit Enabled 4.
LTC4156 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA ≈ TJ = 25°C (Note 2). VBUS = 5V, BATSNS = 3.3V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. SYMBOL PARAMETER CONDITIONS IVOUT VOUT Current Available Before Loading Battery 2.5mA IVBUS Mode (USB Suspend) 100mA IVBUS Mode, BAT = 3.3V 500mA IVBUS Mode, BAT = 3.3V 600mA IVBUS Mode, BAT = 3.
LTC4156 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA ≈ TJ = 25°C (Note 2). VBUS = 5V, BATSNS = 3.3V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. SYMBOL PARAMETER CONDITIONS hCLPROG2 (Note 4) Ratio of Measured VBUS Current to CLPROG2 Sense Current 2.
LTC4156 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA ≈ TJ = 25°C (Note 2). VBUS = 5V, BATSNS = 3.3V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted.
LTC4156 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA ≈ TJ = 25°C (Note 2). VBUS = 5V, BATSNS = 3.3V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. SYMBOL PARAMETER tHD_SDA Hold Time After (Repeated) START Condition CONDITIONS 0.6 µs tSU_SDA Repeated START Condition Set-Up Time 0.6 µs tSU_STO STOP Condition Time 0.
LTC4156 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C (Note 2). VBUS = 5V, BATSNS = 3.3V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. 3.5 Battery and VBUS Currents vs VOUT Current 0.2 0 –0.2 0.2 0.6 0.4 VOUT CURRENT (A) 1.0 0.5 0.8 2 1 0 2 3 VOUT CURRENT (A) 2.5 4 1.0 83 POWER LOST TO BATTERY 75 0.5 0 1.5 2.0 1.0 CURRENT (A) 2.5 900mA MODE 1.25 1.00 500mA MODE 0.75 60 2.4 2.7 3.0 3.3 3.9 3.6 0.50 2.4 VOUT Voltage vs Battery Voltage 80 4.
LTC4156 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C (Note 2). VBUS = 5V, BATSNS = 3.3V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. Battery Charger Resistance vs Temperature Normalized Float Voltage vs Temperature 1.000 55 50 45 40 –15 35 10 TEMPERATURE (°C) 60 85 500mA MODE 0.999 0.998 100mA MODE 0.997 0.996 0.995 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 4613 G10 100 2.5 VBUS CURRENT (mA) NORMALIZED CHARGE CURRENT (%) 3.
LTC4156 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C (Note 2). VBUS = 5V, BATSNS = 3.3V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. Undervoltage Lockout Thresholds vs Temperature OVP Charge Pump Output vs Input Voltage 4.25 10 4 9 3 RISING EDGE MAX 4.15 4.10 FALLING EDGE NOT MAX 4.05 8 7 FALLING EDGE MAX 4.00 BATTERY CURRENT (µA) 4.20 3.95 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) 6 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V) 4155 G19 1.
LTC4156 PIN FUNCTIONS SDA (Pin 1): Data Input/Output for the I2C Serial Port. The I2C input levels are scaled with respect to DVCC for I2C compliance. DVCC (Pin 2): Logic Supply for the I2C Serial Port. DVCC sets the reference level of the SDA and SCL pins for I2C compliance. It should be connected to the same power supply used to power the I2C pull-up resistors. IRQ (Pin 3): Open-Drain Interrupt Output.
LTC4156 PIN FUNCTIONS USBGT to energize the external transistors. If the input voltage exceeds VOVLO, USBGT will be pulled to GND to disable the pass transistors and protect the LTC4156 from high voltage. Power detected on WALLSNS is prioritized over USBSNS. If power is detected on both WALLSNS and USBSNS, by default, only WALLGT will receive drive for its pass transistors. See the Operations section for further information about programmable priority.
LTC4156 PIN FUNCTIONS PROG (Pin 18): Charge Current Program and Monitor Pin. A resistor from PROG to GND programs the maximum battery charge rate. The LTC4156 features I2C programmability enabling software selection of fifteen charge currents that are inversely proportional to a single user-supplied programming resistor. CHGSNS (Pins 19, 20): Battery Charger Current Sense Pin. An internal current sense resistor between VOUT and CHGSNS monitors battery charge current.
TO WALL ADAPTOR TO USB DVCC T VBUS NTC NTC A/D VOUT 0.9V NTCBIAS IRQ SDA SCL DVCC ID OVGCAP WALLSNS WALLGT VBUS VBUS 7 I2C OV UV UV n ×2 CLPROG1 I2C PROGRAMMABLE MASK USB OTG – + – + + – OV + – ENABLE USB OTG – + CLPROG2 SHORT DETECTOR VC END-OF-CHARGE INDICATION VFLOAT D/A 4 2 I 2C I 2C 2 24mV TO 240mV C/x D/A 0.15V TO 1.2V ICHARGE D/A 3.45V TO 3.8V 4.
LTC4156 TIMING DIAGRAMS I2C Write Protocol OPTIONAL WRITE ADDRESS SUB ADDRESS R/ W A7 0 0 0 1 0 0 1 0 SDA 0 0 0 1 0 0 1 0 ACK SCL 1 2 3 4 5 6 7 8 9 A6 A5 A4 A3 INPUT DATA BYTE A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 START STOP ACK 1 2 3 4 5 6 7 8 9 ACK 1 2 3 4 5 6 7 8 9 4155 TD01 I2C Read Protocol READ ADDRESS OUTPUT DATA BYTE R/W A7 0 0 0 1 0 0 1 1 SDA 0 0 0 1 0 0 1 1 ACK SCL 1 2 3 4 5 6 7 8 9 A6 A5 A4 A3 A2 A1
LTC4156 OPERATION I2C Table 2.
LTC4156 OPERATION Introduction The LTC4156 is an advanced I2C controlled power manager and LiFePO4 battery charger designed to efficiently transfer up to 15W from a variety of sources while minimizing power dissipation and easing thermal budgeting constraints. By decoupling VOUT and the battery, the innovative instanton PowerPath architecture ensures that the application is powered immediately after external voltage is applied, even with a completely dead battery, by prioritizing power to the application.
LTC4156 OPERATION When the battery charger is enabled, the switching regulator will reduce its output power to prevent VBATSNS from exceeding the programmed battery float voltage, VFLOAT. The float voltage may be selected from among four possible choices via the I2C interface using bits VFLOAT[1:0]. Refer to Table 11. Battery Charge Current Regulation and Low Cell Trickle Charge The following expression may be used to determine the battery charge current at any time by sampling the PROG pin voltage.
LTC4156 OPERATION discharged. This feature allows instant-on operation when the low state of charge would otherwise prevent operation of the system. If the system load plus battery charger load exceeds the available input power, battery charge current will be sacrificed to prioritize the system load and maintain the switching regulator output voltage while continuing to observe the input current limit.
LTC4156 OPERATION ID Pin Detection For USB On-The-Go compatibility, the step-up switching regulator can optionally start autonomously when the grounded ID pin in the A side of an On-The-Go cable is detected. The ID pin is monitored at all times. Its status is reported in the I2C bit ID_DETECT, reporting true when the ID pin is grounded. Optionally, any change in ID_PIN_DETECT may trigger an interrupt request to notify the system processor.
LTC4156 OPERATION WALLSNS pins. The voltage threshold values previously listed and specified in the Electrical Characteristics table are valid when each input is connected to its respective sense pin through a 3.6k resistor. The status of the USB and WALL inputs is monitored continuously and reported by I2C, with the option of generating several interrupts. When all three conditions previously listed are true, the LTC4156 will report the input valid by asserting USBSNSGD or WALLSNSGD in the I2C port.
LTC4156 OPERATION 2.5mA Linear Suspend Mode The LTC4156 can supply a small amount of current from VBUS to VOUT to power the system and reduce battery discharge when the product has access to a suspended USB port. When the system load current is less than the current available from the suspended USB port, the voltage at VOUT will be regulated to 4.35V.
LTC4156 OPERATION Low Power Ship-and-Store Mode The LTC4156 can reduce its already low standby current to approximately 1µA in a special mode designed for shipment and storage. Unlike normal standby mode, in this mode the external PMOS gate is driven to the battery voltage to disable FET conduction through the external PMOS. This mode may be used to cut off all power to any downstream load on VOUT to maximize battery life between product manufacture and sale.
LTC4156 OPERATION Byte Format Each frame sent to or received from the LTC4156 must be eight bits long, followed by an extra clock cycle for the acknowledge bit. The data should be sent to the LTC4156 most significant bit (MSB) first. Master and Slave Transmitters and Receivers Devices connected to an I2C bus may be classified as either master or slave. A typical bus is composed of one or more master devices and a number of slave devices.
LTC4156 OPERATION subsequent bus read operations. The sub address pointer register is equivalent to the command code byte within the SMBus write byte and read byte protocols explained in detail under the SMBus Protocol Compatibility section. Bus Write Operation The bus master initiates communication with the LTC4156 with a START condition and the LTC4156’s write address. If the address matches that of the LTC4156, the LTC4156 returns an acknowledge. The bus master should then deliver the sub address.
LTC4156 OPERATION as explained in the Alternate Default Input Current Limit section of Operation. Thus, the contents of these registers may be different from the last value written by the bus master, and reading back the contents may be useful to determine the state of the system. When the contents of the sub address pointer register point to a read-only status register, the data returned is a snapshot of the state of the LTC4156 at a particular instant in time.
LTC4156 OPERATION must transmit a NACK at the end of a read transaction to instruct the slave to terminate data transmission. Because the LTC4156 terminates data transmission after one byte in all cases, whether the bus master transmits an ACK or a NACK is irrelevant. Finally, a STOP condition returns the bus to the idle state.
LTC4156 OPERATION Table 8, where the 500mA and 900mA settings also correspond to USB compatible current limits. If input power is removed and reapplied, the LTC4156 will once again default to 100mA mode until commanded to do otherwise by I2C. Table 3.
LTC4156 OPERATION Battery Charger Operation The LTC4156 contains a fully featured constant-current/ constant-voltage LiFePO4 battery charger with automatic recharge, bad cell detection, trickle charge, programmable safety timer, thermistor temperature qualified charging, programmable end-of-charge indication, programmable float voltage, programmable charge current, detailed I2C status reporting, and programmable interrupt generation.
LTC4156 OPERATION Full Capacity Charge Indication (C/x) Automatic Recharge Since the PROG pin always represents the actual charge current flowing, even in the constant-voltage phase of charging, the PROG pin voltage represents the battery’s state-of-charge during that phase. The LTC4156 has a full capacity charge indication comparator on the PROG pin which reports its results via the I2C port.
LTC4156 OPERATION POWER AVAILABLE CLEAR LOW BATTERY AND SAFETY TIMERS NTC OUT-OF-RANGE YES PAUSE SAFETY TIMER NO INDICATE NTC WARNING VBAT < 2.7V TRICKLE CHARGE (8%) VBAT > VFLOAT – ε VBAT 2.
LTC4156 OPERATION thermistor current, and its associated battery drain by a factor of 2000 from its DC value. A typical network using a 10k thermistor causes 115nA of battery drain. A 100k thermistor would reduce this drain to 11.5nA. To improve measurement resolution over the temperature range of interest, the full-scale range of the analog-todigital converter is restricted to the range 0.113 to 0.895 NTCBIAS.
LTC4156 OPERATION Table 7. Input Current Limit Settings Table 5. Input Undervoltage Current Limit Control INPUT UNDERVOLTAGE CURRENT LIMIT CONTROL SUB ADDRESS 0x00 REG0 DISABLE_INPUT_UVCL DIRECTION Write and Readback DISABLE_INPUT_ UVCL D7 Enabled* 0 Disabled 1 D6 D5 D4 D3 D2 D1 D0 *Default setting Table 6.
LTC4156 OPERATION Table 8. Input Connector Priority Swap Table 10. Battery Charger Current Limit INPUT CONNECTOR PRIORITY SWAP SUB ADDRESS REG1 0x01 SUB ADDRESS PRIORITY DIRECTION D7 Wall Input Prioritized* 0 USB Input Prioritized 1 D6 D5 D4 D3 D2 D1 D0 D6 D6 D5 D4 0 0 0 12.50 0.150 0 0 0 1 18.75 0.225 0 0 1 0 25.00 0.300 0 0 1 1 31.25 0.375 0 1 0 0 37.50 0.450 0 1 0 1 TIMER[1:0] 43.75 0.525 0 1 1 0 Write and Readback 50.00 0.
LTC4156 OPERATION Table 14. USB On-The-Go ID Pin Detection Table 11. Battery Charger Float Voltage Battery Charger Float Voltage SUB ADDRESS USB On-The-Go ID PIN DETECTION REG2 0x02 SUB ADDRESS VFLOAT[1:0] DIRECTION D7 D6 D5 D4 0x03 ID_PIN_DETECT DIRECTION Write and Readback BATTERY VOLTAGE (V) REG3 D3 D2 3.45* 0 0 3.55 0 3.60 3.80 D1 D0 ID PIN STATUS Read D7 D6 D5 D4 D3 No Detection 0 1 ID Pin Shorted to GND* 1 1 0 *LOCKOUT_ID_PIN has no effect on pin detection.
LTC4156 OPERATION Table 18. External Power (Wall or USB) Available Table 22.
LTC4156 OPERATION Table 26. NTC Analog-to-Digital Converter Result Table 29. Fault Interrupt Mask NTC ANALOG-TO-DIGITAL CONVERTER RESULT SUB ADDRESS 0x05 FAULT INTERRUPT MASK REG5 NTCVAL[6:0] SUB ADDRESS Read DIRECTION DIRECTION NTC CONVERSION RESULT D7 D6 D5 D4 D3 D2 D1 NTCVAL[6:0]* d d d d d d d D0 See NTC Thermistor Monitor in Operation section to convert ADC result to temperature.
LTC4156 OPERATION Table 31. USB On-The-Go Interrupt Mask USB On-The-Go INTERRUPT MASK SUB ADDRESS 0x06 Write and Readback D7 D6 D5 D4 D3 D2 Table 33.
LTC4156 APPLICATIONS INFORMATION Alternate NTC Thermistors and Biasing The LTC4156 provides temperature qualified charging if a grounded thermistor and a bias resistor are connected to the NTC pin. Charging is paused if the temperature rises above an NTC_HOT_FAULT limit or falls below an NTC_TOO_ COLD limit.
LTC4156 APPLICATIONS INFORMATION where: e = Natural logarithm base, approximately 2.71828 T = Temperature of interest, expressed in Kelvin T0 = Thermistor model nominal temperature, expressed in Kelvin. Typically 298.15K (25°C + 273.15°C) b = Model material constant, expressed in Kelvin. This model is a curve fit at T0 and a second temperature. b is close to 4000K for most thermistors.
LTC4156 APPLICATIONS INFORMATION k •NTCVAL + k OFFSET α T = SPAN αBIAS − α TEMP_ RANGE 1− k SPAN •NTCVAL – k OFFSET T= b k b •NTCVAL + k OFFSET ln SPAN αBIAS − α TEMP_ RANGE + 1− k SPAN •NTCVAL – k OFFSET T0 The generalized form of the NTC equations provided in the Operations section are included above to facilitate interpretation of the thermistor analog to digital converter results using the custom bias network. If only RBIAS was modified, let aTEMP_RANGE = 0.
LTC4156 APPLICATIONS INFORMATION Alternate Input Power Configurations For applications requiring only a single input, the external circuit required for overvoltage protection is considerably simplified. Only a single N-channel MOSFET and resistor are required for positive voltage protection, as shown in Figure 11, and OVGCAP may be left unconnected. Applications using the USB On-The-Go step-up regulator should connect R1 to USBSNS and the gate of MN1 to USBGT.
LTC4156 APPLICATIONS INFORMATION The inductor core should be made from a material such as ferrite, suitable for switching at 2.25MHz without excessive hysteretic losses. Table 36 lists several suitable inductors. Table 36. Recommended Inductors RDC IMAX PACKAGE MANUFACTURER PART NUMBER (mΩ) (A) (mm) Vishay IHLP2525AHE-B1ROMO1 17.5 7 6.5 × 6.9 × 3.2 Coilcraft XFL4020-102ME 10.8 5.4 4 × 4 × 2.1 TDK TDKLTF5022T1R2N4R2-LF 21 4.2 5 × 5.2 × 2.
LTC4156 APPLICATIONS INFORMATION Multilayer ceramic chip capacitors typically have exceptional ESR performance. MLCCs combined with a tight board layout and an unbroken ground plane will yield very good performance and low EMI emissions. The actual in-circuit capacitance of a ceramic capacitor should be measured with a small AC signal and DC bias, as is expected in-circuit.
LTC4156 APPLICATIONS INFORMATION Board Layout Considerations The Exposed Pad on the backside of the LTC4156 package must be securely soldered to the PC board ground. This is the primary ground pin in the package, and it serves as the return path for both the control circuitry and the synchronous rectifier.
LTC4156 TYPICAL APPLICATIONS Single Input USB Default Current Limit with Minimum Component Count 7 11 WALLSNS SW WALLGT VOUTSNS VOUT 23, 24, 25 C3 10µF R1 3.6k TO µC TO µC 9 8 VBUS CHGSNS LTC4156 USBGT BATGATE 4 ID 3 1, 2, 28 2 I C 3 IRQ 10 OVGCAP CLPROG1 CLPROG2 GND VC R2 1.21k 6 29 L1 1µH C2 22µF 13 21, 22 TO SYSTEM LOAD 19, 20 17 MP1 16 BATSNS 14 NTCBIAS USBSNS 5 26, 27 NTC 15 R4 100k 2.4A LIMIT PROG 12 C1 0.
LTC4156 TYPICAL APPLICATIONS Single Input Overvoltage Protection with USB 100mA Default Input Current Limit and 5°C/67°C Thermistor Thresholds 7 11 WALLSNS SW WALLGT VOUTSNS VOUT C3 10µF MN1 23, 24, 25 9 R1 3.6k TO µC TO µC 8 VBUS CHGSNS LTC4156 USBGT BATGATE 4 ID 3 1, 2, 28 2 I C 3 IRQ 10 OVGCAP CLPROG1 CLPROG2 GND VC R2 1.21k 6 29 L1 1µH C2 22µF 13 21, 22 TO SYSTEM LOAD 19, 20 17 MP1 16 BATSNS 14 NTCBIAS USBSNS 5 26, 27 NTC 15 R4 8k 1.8A LIMIT PROG 12 C1 0.
LTC4156 TYPICAL APPLICATIONS Single Input Over/Reverse Voltage Protection, USB Default Input Current Limit and –3°C/66°C Thermistor Thresholds 7 11 WALLSNS SW WALLGT VOUTSNS VOUT C3 10µF MN1A MN1B 23, 24, 25 R1 5M 9 R4 3.6k 8 4 Q1B Q1A R3 47k TO µC TO µC 3 1, 2, 28 3 10 VBUS CHGSNS LTC4156 USBGT BATGATE 26, 27 13 21, 22 19, 20 17 ID I2C IRQ OVGCAP CLPROG1 CLPROG2 GND VC R4 1.21k TO SYSTEM C2 LOAD 22µF MP1 16 BATSNS 14 NTCBIAS USBSNS 5 L1 1µH 6 29 NTC PROG 12 C1 0.
LTC4156 TYPICAL APPLICATIONS Dual Input Over/Undervoltage Protection with 100mA USB Default Current Limit Q1A R1 47k R2 3.6k Q1B R3 5M 7 11 WALLSNS SW WALLGT VOUTSNS VOUT MN1A C3 10µF MN1B MN2A MN2B 23, 24, 25 R4 5M 9 R5 3.
LTC4156 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UFD Package 28-Lead Plastic QFN (4mm × 5mm) (Reference LTC DWG # 05-08-1712 Rev B) 0.70 ±0.05 4.50 ± 0.05 3.10 ± 0.05 2.50 REF 2.65 ± 0.05 3.65 ± 0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 3.50 REF 4.10 ± 0.05 5.50 ± 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ± 0.10 (2 SIDES) 0.75 ± 0.05 PIN 1 NOTCH R = 0.20 OR 0.
LTC4156 TYPICAL APPLICATION Dual Input Overvoltage Protection with 1.21A Default Input Current Limit and Output Voltage Disconnect R1 3.6k 7 11 WALLSNS SW WALLGT VOUTSNS VOUT MN1A C4 10µF MN1B MN2A 23, 24, 25 MN2B VBUS CHGSNS 26, 27 L1 1µH C3 22µF 13 21, 22 TO SYSTEM LOAD 19, 20 MP1 9 R2 3.6k 8 4 TO µC 3 1, 2, 28 3 TO µC 10 USBGT BATGATE 17 ID I2C IRQ OVGCAP CLPROG1 CLPROG2 GND VC 5 R3 1k MP2 16 BATSNS 14 NTCBIAS USBSNS C1 0.
