Datasheet

LTC4155
39
4155fc
Table 30. Fault Interrupt Mask
FAULT INTERRUPT MASK REG6
SUB ADDRESS 0x06 ENABLE_FAULT_INT
DIRECTION Write and Readback
INTERRUPT ENABLE
STATUS D7 D6 D5 D4 D3 D2 D1 D0
Fault Interrupts
Disabled*
0
Fault Interrupts
Enabled
1
*Default.
Interrupt triggered by any change in OVP_ACTIVE, BAD_CELL, OTG_
FAULT or NTC_HOT_FAULT. Any data written to sub address 0x06 has
side effect of clearing any pending interrupt request.
Table 31. External Power Available Interrupt Mask
EXTERNAL POWER AVAILABLE INTERRUPT MASK REG6
SUB ADDRESS 0x06 ENABLE_EXTPWR_INT
DIRECTION Write and Readback
INTERRUPT
ENABLE STATUS D7 D6 D5 D4 D3 D2 D1 D0
External Power
Interrupts
Disabled*
0
External Power
Interrupts Enabled
1
*Default.
Interrupt triggered by any change in USBSNSGD, WALLSNSGD, or
EXTPWRGD. Any data written to sub address 0x06 has side effect of
clearing any pending interrupt request.
Table 32. USB On-The-Go Interrupt Mask
USB On-The-Go INTERRUPT MASK REG6
SUB ADDRESS 0x06 ENABLE_OTG_INT
DIRECTION Write and Readback
INTERRUPT ENABLE
STATUS D7 D6 D5 D4 D3 D2 D1 D0
USB On-The-Go
Interrupts Disabled*
0
USB On-The-Go
Interrupts Enabled
1
*Default.
Interrupt triggered by any change in EN_BOOST, ID_DETECT. Any data
written to sub address 0x06 has side effect of clearing any pending
interrupt request.
Table 33. Input Current Limit Interrupt Mask
INPUT CURRENT LIMIT INTERRUPT MASK REG6
SUB ADDRESS 0x06 ENABLE_AT_ILIM_INT
DIRECTION Write and Readback
INTERRUPT
ENABLE STATUS D7 D6 D5 D4 D3 D2 D1 D0
Input Current Limit
Interrupts Disabled*
0
Input Current Limit
Interrupts Enabled
1
*Default.
Interrupt triggered by any change in AT_INPUT_ILIM. Any data written
to sub address 0x06 has side effect of clearing any pending interrupt
request.
OPERATION