Datasheet
LTC4155
13
4155fc
PIN FUNCTIONS
USBGT to energize the external transistors. If the input
voltage exceeds V
OVLO
, USBGT will be pulled to GND to
disable the pass transistors and protect the LTC4155 from
high voltage.
Power detected on WALLSNS is prioritized over USBSNS.
If power is detected on both WALLSNS and USBSNS, by
default, only WALLGT will receive drive for its pass tran-
sistors. See the Operations section for further information
about programmable priority.
USBGT (Pin 9): Overvoltage Protection and Priority Mul-
tiplexer Gate Output. Connect USBGT to the gate pins of
two source-connected external N-channel MOSFET pass
transistors. One drain of the transistors should be con-
nected to V
BUS
and the other drain should be connected
to a low priority DC input connector. In the absence of an
overvoltage condition, this pin is driven from an internal
charge pump capable of creating sufficient overdrive to fully
enhance the pass transistors. If an overvoltage condition
is detected, USBGT is brought rapidly to GND to prevent
damage to the LTC4155. USBGT works in conjunction with
USBSNS to provide this protection. USBGT also works in
conjunction with WALLSNS to determine power source
prioritization. See the Operation section.
OVGCAP (Pin 10): Overvoltage Protection Capacitor
Output. A 0.1µF capacitor should be connected from
OVGCAP to GND. OVGCAP is used to store charge so
that it can be rapidly moved to WALLGT or USBGT. This
feature provides faster power switchover when multiple
inputs are supported by the end product.
WALLGT (Pin 9): Overvoltage Protection and Priority Mul-
tiplexer Gate Output. Connect WALLGT to the gate pins of
two source-connected external N-channel MOSFET pass
transistors. One drain of the transistors should be con-
nected to V
BUS
and the other drain should be connected
to a high priority input connector. In the absence of an
overvoltage condition, this pin is driven from an internal
charge pump capable of creating sufficient gate drive to fully
enhance the pass transistors. If an overvoltage condition
is detected, WALLGT is brought rapidly to GND to prevent
damage to the LTC4155. WALLGT works in conjunction
with WALLSNS to provide this protection. WALLGT also
works in conjunction with USBSNS to determine power
source prioritization. See the Operation section.
V
C
(Pin 12): Compensation Pin. A 0.047F ceramic ca-
pacitor on this pin compensates the switching regulator
control loops.
V
OUTSNS
(Pin 13): Output Voltage Sense Input. Connecting
V
OUTSNS
directly to the V
OUT
bypass capacitor ensures that
V
OUT
regulates at the correct level.
NTCBIAS (Pin 14): NTC Thermistor Bias Output. Connect a
bias resistor between NTCBIAS and NTC, and a thermistor
between NTC and GND. The value of the bias resistor should
usually be equal to the nominal value of the thermistor.
NTC (Pin 15): Input to the Negative Temperature Coefficient
Thermistor Monitoring Circuit. The NTC pin connects to
a negative temperature coefficient thermistor, which is
typically copackaged with the battery, to determine if the
battery is too warm or too cold to charge or if the battery
is dangerously hot. If the battery’s temperature is out of
range, charging is paused until the battery temperature re-
enters the valid range. A low drift bias resistor is required
from NTCBIAS to NTC and a thermistor is required from
NTC to ground. The thermistor’s temperature reading is
continually digitized by an analog to digital converter and
may be read back at any time via the I
2
C port.
BATSNS (Pin 16): Battery Voltage Sense Input. For proper
operation, this pin must always be connected to the battery.
For fastest charging, connect BATSNS physically close to
the Lithium-Ion cell’s positive terminal. Depending upon
available power and load, a Li-Ion battery connected to
the BATSNS pin will either be charged from V
OUT
or will
deliver system power to V
OUT
via the required external
P-channel MOSFET transistor.
BATGATE (Pin 17): Battery Charger and Ideal Diode Am-
plifier Control Output. This pin controls the gate of an
external P-channel MOSFET transistor used to charge the
Lithium-Ion cell and to provide power to V
OUT
when the
system load exceeds available input power. The source of
the P-channel MOSFET should be connected to CHGSNS
and the drain should be connected to BATSNS and the
battery.