LTC4155 Dual-Input Power Manager/ 3.5A Li-Ion Battery Charger with I2C Control and USB OTG FEATURES DESCRIPTION n The LTC®4155 is a 15 watt I2C controlled power manager with PowerPath™ instant-on operation, high efficiency switching battery charging and USB compatibility. The LTC4155 seamlessly manages power distribution from two 5V sources, such as a USB port and a wall adapter, to a single-cell rechargeable Lithium-Ion/Polymer battery and a system load.
LTC4155 TABLE OF CONTENTS Features ............................................................................................................................ 1 Applications ....................................................................................................................... 1 Typical Application ............................................................................................................... 1 Description......................................................................
LTC4155 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2) VBUS VBUS VBUS SW SW TOP VIEW SCL VBUS (Transient) t < 1ms, Duty Cycle < 1% ... –0.3V to 7V VBUS (Steady State), BATSNS, IRQ, NTC...... –0.3V to 6V DVCC, SDA, SCL (Note 3) ........................–0.3V to VMAX IWALLSNS, IUSBSNS ............................................... ±20mA INTCBIAS, IIRQ ..........................................................10mA ISW, IVOUT, ICHGSNS (Both Pins in Each Case)..............
LTC4155 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA ≈ TJ = 25°C (Note 2). VBUS = 5V, BATSNS = 3.7V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Switching Battery Charger l VBUS Input Supply Voltage VBUSREG Undervoltage Current Reduction Input Undervoltage Current Limit Enabled 4.
LTC4155 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA ≈ TJ = 25°C (Note 2). VBUS = 5V, BATSNS = 3.7V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. SYMBOL PARAMETER CONDITIONS IVOUT VOUT Current Available Before Loading Battery 2.5mA IVBUS Mode (USB Suspend) 100mA IVBUS Mode, BAT = 3.3V 500mA IVBUS Mode, BAT = 3.3V 600mA IVBUS Mode, BAT = 3.
LTC4155 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA ≈ TJ = 25°C (Note 2). VBUS = 5V, BATSNS = 3.7V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. SYMBOL PARAMETER CONDITIONS hCLPROG2 (Note 4) Ratio of Measured VBUS Current to CLPROG2 Sense Current 2.
LTC4155 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA ≈ TJ = 25°C (Note 2). VBUS = 5V, BATSNS = 3.7V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VWALLGTPROT WALLGT Output Voltage Protected WALLSNS > VWALLOVLO VUSBGTLOAD, USBGT, WALLGT Voltage Under VWALLGTLOAD Load 5V Through 3.
LTC4155 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA ≈ TJ = 25°C (Note 2). VBUS = 5V, BATSNS = 3.7V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted.
LTC4155 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C (Note 2). VBUS = 5V, BATSNS = 3.7V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. Battery and VBUS Currents vs VOUT Current Battery and VBUS Currents vs VOUT Current 4 0.6 INPUT CURRENT 9 CURRENT (A) CHARGE CURRENT 0 IBUS 7 2 ICHG 1 0 –0.2 VBUS = 0V 8 CURRENT (μA) 0.4 CURRENT (A) 10 3A INPUT CURRENT LIMIT MODE 3 0.2 Battery Drain Current vs Temperature 6 5 4 3 SUSPEND MODE (μA) 2 –1 1 –0.
LTC4155 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C (Note 2). VBUS = 5V, BATSNS = 3.7V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. Battery Charger Resistance vs Temperature Normalized Float Voltage vs Temperature 2.29 1.000 55 50 45 40 RESISTANCE INCLUDES VISHAY SILICONIX Si5481DU EXTERNAL PMOS –15 35 10 TEMPERATURE (°C) 60 85 0.998 100mA MODE 0.997 0.996 4613 G10 100 2.5 VBUS CURRENT (mA) NORMALIZED CHARGE CURRENT (%) 3.
LTC4155 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C (Note 2). VBUS = 5V, BATSNS = 3.7V, DVCC = 3.3V, RCLPROG1 = RCLPROG2 = 1.21k, RPROG = 499Ω, unless otherwise noted. Undervoltage Lockout Thresholds vs Temperature OVP Charge Pump Output vs Input Voltage 0.20 10 4.30 –45°C –30°C –15°C 0°C 15°C 30°C 45°C 60°C 75°C 90°C 105°C 120°C 135°C DISCHARGE CURRENT (A) RISING UVLO NOT MAX 4.25 9 USBGT WALLGT (V) 4.20 RISING UVLO MAX 4.15 FALLING UVLO NOT MAX 4.10 4.05 8 7 FALLING UVLO MAX 0.15 0.
LTC4155 PIN FUNCTIONS SDA (Pin 1): Data Input/Output for the I2C Serial Port. The I2C input levels are scaled with respect to DVCC for I2C compliance. DVCC (Pin 2): Logic Supply for the I2C Serial Port. DVCC sets the reference level of the SDA and SCL pins for I2C compliance. It should be connected to the same power supply used to power the I2C pull-up resistors. IRQ (Pin 3): Open-Drain Interrupt Output.
LTC4155 PIN FUNCTIONS USBGT to energize the external transistors. If the input voltage exceeds VOVLO, USBGT will be pulled to GND to disable the pass transistors and protect the LTC4155 from high voltage. Power detected on WALLSNS is prioritized over USBSNS. If power is detected on both WALLSNS and USBSNS, by default, only WALLGT will receive drive for its pass transistors. See the Operations section for further information about programmable priority.
LTC4155 PIN FUNCTIONS PROG (Pin 18): Charge Current Program and Monitor Pin. A resistor from PROG to GND programs the maximum battery charge rate. The LTC4155 features I2C programmability enabling software selection of fifteen charge currents that are inversely proportional to a single user-supplied programming resistor. CHGSNS (Pins 19, 20): Battery Charger Current Sense Pin. An internal current sense resistor between VOUT and CHGSNS monitors battery charge current.
TO WALL ADAPTOR TO USB DVCC T VBUS NTC NTC A/D VOUT 0.9V NTCBIAS IRQ SDA SCL DVCC ID OVGCAP WALLSNS WALLGT VBUS VBUS 7 I2C OV UV UV n w2 CLPROG1 I2C PROGRAMMABLE MASK USB OTG – + – + + – OV + – ENABLE USB OTG – + CLPROG2 SHORT DETECTOR VC END-OF-CHARGE INDICATION VFLOAT D/A 4 2 C/x D/A 0.15V TO 1.2V ICHARGE D/A 4.05V to 4.2V 4.
LTC4155 TIMING DIAGRAMS I2C Write Protocol OPTIONAL SUB ADDRESS WRITE ADDRESS INPUT DATA BYTE R/W A7 0 0 0 1 0 0 1 0 SDA 0 0 0 1 0 0 1 0 ACK SCL 1 2 3 4 5 6 7 8 9 A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 START STOP ACK 1 2 3 4 5 6 7 8 9 ACK 1 2 3 4 5 6 7 8 9 4155 TD01 I2C Read Protocol OUTPUT DATA BYTE R/ W READ ADDRESS A7 0 0 0 1 0 0 1 1 SDA 0 0 0 1 0 0 1 1 ACK SCL 1 2 3 4 5 6 7 8 9 A6 A5 A4 A3 A2 A
LTC4155 OPERATION I2C Table 2.
LTC4155 OPERATION Introduction The LTC4155 is an advanced I2C controlled power manager and Li-Ion/Polymer battery charger designed to efficiently transfer up to 15W from a variety of sources while minimizing power dissipation and easing thermal budgeting constraints.
LTC4155 OPERATION When the battery charger is enabled, the switching regulator will reduce its output power to prevent VBATSNS from exceeding the programmed battery float voltage, VFLOAT. The float voltage may be selected from among four possible choices via the I2C interface using bits VFLOAT[1:0]. Refer to Table 12. Battery Charge Current Regulation and Low Cell Trickle Charge The following expression may be used to determine the battery charge current at any time by sampling the PROG pin voltage.
LTC4155 OPERATION discharged. This feature allows instant-on operation when the low state of charge would otherwise prevent operation of the system. If the system load plus battery charger load exceeds the available input power, battery charge current will be sacrificed to prioritize the system load and maintain the switching regulator output voltage while continuing to observe the input current limit.
LTC4155 OPERATION ID Pin Detection For USB On-The-Go compatibility, the step-up switching regulator can optionally start autonomously when the grounded ID pin in the A side of an On-The-Go cable is detected. The ID pin is monitored at all times. Its status is reported in the I2C bit ID_DETECT, reporting true when the ID pin is grounded. Optionally, any change in ID_PIN_DETECT may trigger an interrupt request to notify the system processor.
LTC4155 OPERATION WALLSNS pins. The voltage threshold values previously listed and specified in the Electrical Characteristics table are valid when each input is connected to its respective sense pin through a 3.6k resistor. The status of the USB and WALL inputs is monitored continuously and reported by I2C, with the option of generating several interrupts. When all three conditions previously listed are true, the LTC4155 will report the input valid by asserting USBSNSGD or WALLSNSGD in the I2C port.
LTC4155 OPERATION 2.5mA Linear Suspend Mode The LTC4155 can supply a small amount of current from VBUS to VOUT to power the system and reduce battery discharge when the product has access to a suspended USB port. When the system load current is less than the current available from the suspended USB port, the voltage at VOUT will be regulated to 4.35V.
LTC4155 OPERATION Low Power Ship-and-Store Mode The LTC4155 can reduce its already low standby current to approximately 1μA in a special mode designed for shipment and storage. Unlike normal standby mode, in this mode the external PMOS gate is driven to the battery voltage to disable FET conduction through the external PMOS. This mode may be used to cut off all power to any downstream load on VOUT to maximize battery life between product manufacture and sale.
LTC4155 OPERATION Byte Format Each frame sent to or received from the LTC4155 must be eight bits long, followed by an extra clock cycle for the acknowledge bit. The data should be sent to the LTC4155 most significant bit (MSB) first. Master and Slave Transmitters and Receivers Devices connected to an I2C bus may be classified as either master or slave. A typical bus is composed of one or more master devices and a number of slave devices.
LTC4155 OPERATION subsequent bus read operations. The sub address pointer register is equivalent to the command code byte within the SMBus write byte and read byte protocols explained in detail under the SMBus Protocol Compatibility section. Bus Write Operation The bus master initiates communication with the LTC4155 with a START condition and the LTC4155’s write address. If the address matches that of the LTC4155, the LTC4155 returns an acknowledge. The bus master should then deliver the sub address.
LTC4155 OPERATION as explained in the Alternate Default Input Current Limit section of Operation. Thus, the contents of these registers may be different from the last value written by the bus master, and reading back the contents may be useful to determine the state of the system. When the contents of the sub address pointer register point to a read-only status register, the data returned is a snapshot of the state of the LTC4155 at a particular instant in time.
LTC4155 OPERATION a NACK is irrelevant. Finally, a STOP condition returns the bus to the idle state. SMBus Send Byte Protocol 1 7 S SLAVE ADDRESS 1 1 WR A 8 1 1 DATA BYTE A P The SMBus send byte protocol can be used to modify the contents of the sub address pointer register without modifying the contents of any control registers. It has utility when preparing to later read status information from the LTC4155 using the SMBus receive byte protocol.
LTC4155 OPERATION Table 8, where the 500mA and 900mA settings also correspond to USB compatible current limits. If input power is removed and reapplied, the LTC4155 will once again default to 100mA mode until commanded to do otherwise by I2C. Table 3.
LTC4155 OPERATION Battery Charger Operation The LTC4155 contains a fully featured constant-current/ constant-voltage Li-Ion/Li-Polymer battery charger with automatic recharge, bad cell detection, trickle charge, programmable safety timer, thermistor temperature qualified charging, programmable end-of-charge indication, programmable float voltage, programmable charge current, detailed I2C status reporting, and programmable interrupt generation.
LTC4155 OPERATION Full Capacity Charge Indication (C/x) Automatic Recharge Since the PROG pin always represents the actual charge current flowing, even in the constant-voltage phase of charging, the PROG pin voltage represents the battery’s state-of-charge during that phase. The LTC4155 has a full capacity charge indication comparator on the PROG pin which reports its results via the I2C port.
LTC4155 OPERATION POWER AVAILABLE CLEAR LOW BATTERY AND SAFETY TIMERS NTC OUT-OF-RANGE YES PAUSE SAFETY TIMER NO INDICATE NTC FAULT VBAT < 2.8V TRICKLE CHARGE (8%) VBAT > VFLOAT – J VBAT 2.
LTC4155 OPERATION thermistor current, and its associated battery drain by a factor of 2000 from its DC value. A typical network using a 10k thermistor causes 115nA of battery drain. A 100k thermistor would reduce this drain to 11.5nA. To improve measurement resolution over the temperature range of interest, the full-scale range of the analog-todigital converter is restricted to the range 0.113 to 0.895 NTCBIAS.
LTC4155 OPERATION curve 2 thermistor. The critically hot temperature indication is cleared when NTCVAL rises to decimal result 23. This corresponds to αCRITICAL,RESET = 0.341 and 55.5°C for a Vishay curve 2 thermistor. It is possible to modify the thermistor bias network to adjust either one or two of the above temperature thresholds. Because of the limited degrees of freedom in the bias network, the remaining temperature threshold(s) will then be constrained by the chosen network and thermistor properties.
LTC4155 OPERATION Table 8. Input Current Limit Settings Table 5. Input Undervoltage Current Limit Control INPUT UNDERVOLTAGE CURRENT LIMIT CONTROL SUB ADDRESS 0x00 REG0 DISABLE_INPUT_UVCL DIRECTION Write and Readback D7 Enabled* 0 Disabled 1 D6 D5 D4 D3 D2 D1 D0 *Default setting Table 6.
LTC4155 OPERATION Table 10. Battery Charger Safety Timer Table 12. Battery Charger Float Voltage BATTERY CHARGER SAFETY TIMER SUB ADDRESS REG1 0x01 TIMER[1:0] DIRECTION SUB ADDRESS D7 D6 D5 0 0 4 Hr* D4 D3 REG2 0x02 VFLOAT[1:0] DIRECTION Write and Readback TIMER[1:0] Battery Charger Float Voltage D2 D1 D0 Write and Readback BATTERY VOLTAGE (V) D3 D2 4.05* D7 D6 D5 D4 0 0 4.10 0 1 8 Hr or C/x Indication 0 1 1 Hr 1 0 4.15 1 0 2 Hr 1 1 4.
LTC4155 OPERATION Table 15. USB On-The-Go ID Pin Detection Table 19. External Power (Wall or USB) Available USB On-The-Go ID PIN DETECTION SUB ADDRESS REG3 0x03 ID_PIN_DETECT DIRECTION ID PIN STATUS EXTERNAL POWER (WALL OR USB) AVAILABLE SUB ADDRESS Read D7 D6 D5 No Detection D4 EXT_PWR_GOOD DIRECTION D3 D2 D1 D0 0 ID Pin Shorted to GND* 0x04 1 *LOCKOUT_ID_PIN has no effect on pin detection.
LTC4155 OPERATION Table 23. Input Undervoltage Current Limit (Brownout) Status Table 27.
LTC4155 OPERATION Table 30. Fault Interrupt Mask Table 32.
LTC4155 OPERATION Table 34. Input Undervoltage Current Limit (Brownout Detection) Interrupt Mask INPUT UNDERVOLTAGE CURRENT LIMIT (BROWNOUT DETECTION) INTERRUPT MASK SUB ADDRESS 0x06 DIRECTION INTERRUPT ENABLE STATUS D7 D6 Table 35.
LTC4155 APPLICATIONS INFORMATION RTEMP_RANGE Optional dilution resistor, connected in series with the thermistor. r αT ≡ T r25 Thermistor resistance ratio at any temperature T relative to its reference temperature. α TOO _ COLD ≡ rTOO _ COLD r25 Thermistor resistance ratio at desired NTC_TOO_COLD threshold temperature relative to its reference temperature. α TOO _ WARM ≡ rTOO _ WARM r25 Thermistor resistance ratio at desired NTC_TOO_WARM threshold temperature relative to its reference temperature.
LTC4155 APPLICATIONS INFORMATION substitute into the appropriate following equation to calculate the value αBIAS and then RBIAS. αBIAS = 0.34917 • αTOO_COLD To specify TTOO_COLD and TTOO_WARM, then calculate THOT_FAULT: αBIAS = 1.73735 • αTOO_WARM αTEMP_RANGE = 0.25153 • αTOO_COLD – 1.25153 • αTOO_WARM αBIAS = 3.35249 • αHOT_FAULT RTEMP_RANGE = αTEMP_RANGE • r25 RBIAS = αBIAS • r25 αBIAS = 0.
LTC4155 APPLICATIONS INFORMATION ⎡ κ • NTCVAL + κOFFSET ⎤ α T = ⎢ SPAN ⎥αBIAS − α TEMP_ RANGE ⎣ 1− κSPAN • NTCVAL – κOFFSET ⎦ T= β ⎛⎡ κ ⎞ β • NTCVAL + κOFFSET ⎤ ln ⎜⎢ SPAN ⎥αBIAS − α TEMP_ RANGE ⎟ + ⎝⎣ 1− κSPAN • NTCVAL – κOFFSET ⎦ ⎠ T0 The generalized form of the NTC equations provided in the Operations section are included above to facilitate interpretation of the thermistor analog to digital converter results using the custom bias network. If only RBIAS was modified, let αTEMP_RANGE = 0.
LTC4155 APPLICATIONS INFORMATION the drain breakdown voltage rating of MN3 and MN4 and negative protection down to the drain breakdown voltage rating of MN1 and MN2. Q1 and Q2 are small-signal transistors to protect the gate oxides of MN1 and MN2. Note that it is necessary to orient the N-channel MOSFETs with the drain connections common and the source/body connections to the input connector and the VBUS pin.
LTC4155 APPLICATIONS INFORMATION Table 38. Recommended P-Channel Battery Charger MOSFETs MANUFACTURER Fairchild Vishay Vishay PART NUMBER FDMC510P Si7123DN Si5481DU RDS(ON) (mΩ) 7.6 11.2 24 VT (V) –0.5 –1 –1 BVDSS (V) –20 –20 –20 present in the application. Using similar operating conditions as the application, the user must measure, or request from the vendor, the actual capacitance to determine if the selected capacitor meets the minimum capacitance that the application requires.
LTC4155 APPLICATIONS INFORMATION stable behavior, but if engaged, it will result in much less power delivery to the system load and battery, depending on the magnitude of input resistance. ground plane from this capacitor’s ground return to the inductor, input capacitor, and LTC4155 Exposed Pad will reduce output voltage ripple.
LTC4155 TYPICAL APPLICATIONS Single Input USB Default Current Limit with Minimum Component Count 7 WALLSNS 11 SW WALLGT VOUTSNS VOUT 23, 24, 25 VBUS C3 10μF LTC4155 9 R1 3.6k CHGSNS 8 TO μC TO μC 21, 22 17 USBSNS 16 BATSNS 14 NTCBIAS 6 29 2.4A LIMIT 15 PROG 12 18 C1 0.047μF R2 1.
LTC4155 TYPICAL APPLICATIONS Single Input Over/Reverse Protection, USB Default Input Current Limit and –3°C/44°C/66°C Thermistor Thresholds 7 11 WALLSNS SW WALLGT VOUTSNS VOUT C3 10μF MN1A MN1B 23, 24, 25 R1 5M 9 R4 3.6k 8 4 Q1B Q1A R3 47k TO μC TO μC 3 1, 2, 28 3 10 VBUS CHGSNS LTC4155 26, 27 21, 22 19, 20 17 BATGATE USBSNS 16 BATSNS 14 NTCBIAS I2C MP1 R6 11.5k IRQ OVGCAP CLPROG1 CLPROG2 GND VC 5 R4 1.21k 6 29 NTC PROG 12 C1 0.
LTC4155 TYPICAL APPLICATIONS Dual-Input Over/Undervoltage Protection with 100mA USB Default Current Limit Q1A R1 47k R2 3.6k Q1B R3 5M 7 11 WALLSNS SW WALLGT VOUTSNS VOUT MN1A C3 10μF MN1B MN2A MN2B 23, 24, 25 R4 5M 9 R5 3.
LTC4155 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UFD Package 28-Lead Plastic QFN (4mm w 5mm) (Reference LTC DWG # 05-08-1712 Rev B) 0.70 t0.05 4.50 t0.05 3.10 t0.05 2.50 REF 2.65 t0.05 3.65 t0.05 PACKAGE OUTLINE 0.25 t0.05 0.50 BSC 3.50 REF 4.10 t0.05 5.50 t0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 t0.10 (2 SIDES) 0.75 t0.05 R = 0.05 TYP PIN 1 NOTCH R = 0.
LTC4155 REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 2/12 Updated Typical Application circuit 1 Clarified Electrical Characteristics specs and conditions 4, 5, 6, 7 Revised Typical Performance Characteristics graphs 9, 10, 11 Clarified I2C Operation table 17 Changed output current limit callout 20 Revised equations 22 Clarified ship-and-store mode operation Changed Typical Applications circuits and notes 24 48, 49, 52 B 3/12 Corrected resistor Equation 29 C 5/12 Modified hCL
LTC4155 TYPICAL APPLICATION Dual-Input Overvoltage Protection with 1.21A Default Input Current Limit and Output Voltage Disconnect R1 3.6k 7 11 WALLSNS SW WALLGT VOUTSNS VOUT 26, 27 L1 1μH C3 22μF 13 21, 22 TO SYSTEM LOAD MN1A C4 10μF MN1B 23, 24, 25 MN2A MN2B VBUS CHGSNS 19, 20 MP1 9 R2 3.
