Datasheet

LTC4089-3
8
40893f
For more information www.linear.com/4089-3
GND (Pins 1, 2, Exposed Pad Pin 23): Ground. Tie the
GND pin to a local ground plane below the LTC4089-3
and the circuit components. The exposed package pad is
ground and must be soldered to the PC board for proper
functionality and for maximum heat transfer (use several
vias directly under the LTC4089-3).
HVOUT (Pins 3, 18): Voltage Output of the High Voltage
Regulator. When sufficient voltage is present at HVOUT,
the low voltage power path from IN to OUT will be discon-
nected and the HVPR pin will be pulled low to indicate
that a high voltage wall adapter has been detected. The
LTC4089-3 high voltage regulator will maintain just enough
differential voltage between HVOUT and BAT to keep the
battery charger MOSFET out of dropout (typically 300mV
from OUT to BAT). HVOUT should be bypassed with at least
10µF to GND. Connect Pins 3 and 18 with a resistance
no greater than 1
.
V
C
(Pin 4): Leave the V
C
pin floating or bypass to ground
with a 10pF capacitor. This optional 10pF capacitor reduces
HVOUT ripple in discontinuous mode.
NTC (Pin 5): Input to the NTC Thermistor Monitoring
Circuit. The NTC pin connects to a negative temperature
coefficient thermistor which is typically co-packaged with
the battery pack to determine if the battery is too hot or
too cold to charge. If the battery temperature is out of
range, charging is paused until the battery temperature
re-enters the valid range. A low drift bias resistor is re-
quired from IN to NTC and a thermistor is required from
NTC to ground. To disable the NTC function, the NTC pin
should be grounded.
Connect the NTC pin to ground to disable this feature. This
will disable all of the LTC4089-3 NTC functions.
VNTC (Pin 6): Output Bias Voltage for NTC. A resistor from
this pin to the NTC pin will bias the NTC thermistor.
HVPR (Pin 7): High Voltage Present Output. Active low
open-drain output pin. A low on this pin indicates that the
high voltage regulator has sufficient voltage to charge the
battery. This feature is disabled if no power is present on
HVIN, IN or BAT (i.e., below UVLO thresholds).
CHRG (Pin 8): Open-Drain Charge Status Output. When
the battery is being charged, the CHRG pin is pulled low by
an internal N-channel MOSFET. When the timer runs out or
the charge current drops below 10% of the programmed
charge current or the input supply is removed, the CHRG
pin is forced to a high impedance state.
PROG (Pin 9): Charge Current Program. Connecting a
resistor, R
PROG
, to ground programs the battery charge
current. The battery charge current is programmed
as follows:
I
CHG
(A) =
50,000V
R
PROG
GATE (Pin 10): External Ideal Diode Gate Pin. This pin can
be used to drive the gate of an optional external PFET con-
nected between BAT (drain) and OUT (source). By doing
so, the impedance of the ideal diode between BAT and
OUT can be reduced. When not in use, this pin should be
left floating. It is important to maintain a high impedance
on this pin and minimize all leakage paths.
BAT (Pin 11): Connect to a single cell Li-Ion battery. This
pin is used as an output when charging the battery and as
an input when supplying power to OUT. When the OUT pin
potential drops below the BAT pin potential, an ideal diode
function connects BAT to OUT and prevents V
OUT
from
dropping more than 100mV below V
BAT
. A precision internal
resistor divider sets the final float (charging) potential on
this pin. The internal resistor divider is disconnected when
IN and HVIN are in undervoltage lockout.
IN (Pin 12): Input Supply. Connect to USB supply, V
BUS
.
Input current to this pin is limited to either 20% or 100%
of the current programmed by the CLPROG pin as de-
termined by the state of the HPWR pin. Charge current
(to the BAT pin) supplied through the input is set to the
current programmed by the PROG pin but will be limited
by the input current limit if charge current is set greater
than the input current limit.
PIN FUNCTIONS