Datasheet
LTC4089-3
16
40893f
For more information www.linear.com/4089-3
Consider, for example, a USB charge condition where
R
CLPROG
= 2k, R
PROG
= 100k and C
TIMER
= 0.1µF. This
corresponds to a three hour charge cycle. However, if the
HPWR input is set to a logic low, then the input current
limit will be reduced from 500mA to 100mA. With no ad-
ditional system load, this means the charge current will
be reduced to 100mA. Therefore, the termination timer
will automatically slow down by a factor of five until the
charger reaches constant-voltage mode (i.e., V
BAT
= 4.2V)
or HPWR is returned to a logic high. The charge cycle is
automatically lengthened to account for the reduced charge
current. The exact time of the charge cycle will depend on
how long the charger remains in constant-current mode
and/or how long the HPWR pin remains a logic low.
Once a timeout occurs and the voltage on the battery is
greater than the recharge threshold, the charge current
stops, and the CHRG output assumes a high impedance
state if it has not already done so.
Connecting the TIMER pin to ground disables the battery
charger.
CHRG Status Output Pin
When the charge cycle starts, the CHRG pin is pulled to
ground by an internal N-channel MOSFET capable of driving
an LED. When the charge current drops below 10% of the
programmed full charge current while in constant-voltage
mode, the pin assumes a high impedance state, but charge
current continues to flow until the charge time elapses. If
this state is not reached before the end of the program-
mable charge time, the pin will assume a high impedance
state when a timeout occurs. The CHRG current detection
threshold can be calculated by the following equation:
I
DETECT
=
0.1V
R
PROG
• 50,000 =
5000V
R
PROG
For example, if the full charge current is programmed
to 500mA with a 100k PROG resistor the CHRG pin will
change state at a battery charge current of 50mA.
Note: The end-of-charge (EOC) comparator that moni-
tors the charge current latches its decision. Therefore,
the first time the charge current drops below 10% of the
programmed full charge current while in constant-voltage
mode, it will toggle CHRG to a high impedance state. If,
for some reason the charge current rises back above the
threshold, the CHRG pin will not resume the strong pull-
down state. The EOC latch can be reset by a recharge
cycle (i.e., V
BAT
drops below the recharge threshold) or
toggling the input power to the part.
NTC Thermistor—Battery Temperature Charge
Qualification
The battery temperature is measured by placing a nega-
tive temperature coefficient (NTC) thermistor close to the
battery pack. The NTC circuitry is shown in Figure 4.
To use this feature, connect the NTC thermistor (R
NTC
)
between the NTC pin and ground and a resistor (R
NOM
) from
the NTC pin to VNTC. R
NOM
should be a 1% resistor with
a value equal to the value of the chosen NTC thermistor at
25°C (this value is 10k for a Vishay NTHS0603N02N1002J
thermistor). The LTC4089-3 goes into hold mode when
the resistance (R
HOT
) of the NTC thermistor drops to 0.48
times the value of R
NOM
, or approximately 4.8k, which
should be at 45°C. The hold mode freezes the timer and
stops the charge cycle until the thermistor indicates a re-
turn to a valid temperature. As the temperature drops, the
Figure 4. NTC Circuit
–
+
–
+
R
NOM
10k
R
NTC
10k
NTC
VNTC
6
0.1V
NTC_ENABLE
40893 F04
LTC4089-3
TOO_COLD
TOO_HOT
0.74 • VNTC
0.326 • VNTC
–
+
5
OPERATION