Datasheet

LTC4085
20
4085fd
The nearest 1% value for R
NOM
is 115K. This is the value
used to bias the NTC thermistor to get cold and hot trip
points of approximately 0°C and 44°C respectively. To
extend the delta between the cold and hot trip points a
resistor (R1) can be added in series with R
NTC
. (see Figure
3b). The values of the resistors are calculated as follows:
R
NOM
=
R
COLD
–R
HOT
2.815 – 0.4086
R1=
0.4086
2.815 – 0.4086
⎛
⎝
⎜
⎞
⎠
⎟
•R
COLD
–R
HOT
()
–R
HOT
where R
NOM
is the value of the bias resistor, R
HOT
and
R
COLD
are the values of R
NTC
at the desired temperature
trip points. Continuing the example from before with a
desired hot trip point of 50°C:
R
NOM
=
R
COLD
–R
HOT
2.815 – 0.4086
=
100k • 3.266 – 0.3602
()
2.815 – 0.4086
= 120.8k, 121k nearest 1%
R1= 100k •
0.4086
2.815 – 0.4086
⎛
⎝
⎜
⎞
⎠
⎟
• 3.266 – 0.3602
()
– 0.3602
⎡
⎣
⎢
⎤
⎦
⎥
= 13.3k, 13.3k is nearest 1%
The final solution is as shown in Figure 3b where
R
NOM
= 121k, R1 = 13.3k and R
NTC
= 100k at 25°C
Using the WALL Pin to Detect the Presence of a Wall
Adapter
The WALL input pin identifies the presence of a wall
adapter (the pin should be tied directly to the adapter
output voltage). This information is used to disconnect the
input pin, IN, from the OUT pin in order to prevent back
conduction to whatever may be connected to the input.
It also forces the ACPR pin low when the voltage at the
WALL pin exceeds the input threshold. In order for the
presence of a wall adapter to be acknowledged, both of
the following conditions must be satisfied:
1. The WALL pin voltage exceeds V
WAR
(approximately
4.25V); and
2. The WALL pin voltage exceeds V
WDR
(approximately
75mV above V
BAT
)
The input power path (between IN and OUT) is re-enabled
and the ACPR pin assumes a high impedance state when
either of the following conditions is met:
1.
The WALL pin voltage falls below V
WDF
(approximately
25mV above V
BAT
); or
2.
The WALL pin voltage falls below V
WAF
(approximately
3.12V)
Each of these thresholds is suitably filtered in time to
prevent transient glitches on the WALL pin from falsely
triggering an event.
Power Dissipation
The conditions that cause the LTC4085 to reduce charge
current due to the thermal protection feedback can be
approximated by considering the power dissipated in the
part. For high charge currents and a wall adapter applied
to V
OUT
, the LTC4085 power dissipation is approximately:
P
D
= (V
OUT
– V
BAT
) • I
BAT
Where, P
D
is the power dissipated, V
OUT
is the supply
voltage, V
BAT
is the battery voltage, and I
BAT
is the battery
charge current. It is not necessary to perform any worst-
case power dissipation scenarios because the LTC4085
will automatically reduce the charge current to maintain
the die temperature at approximately 105°C. However, the
approximate ambient temperature at which the thermal
feedback begins to protect the IC is:
T
A
= 105°C – P
D
• θ
JA
T
A
= 105°C – (V
OUT
– V
BAT
) • I
BAT
• θ
JA
Example: Consider an LTC4085 operating from a wall
adapter with 5V at V
OUT
providing 0.8A to a 3V Li-Ion battery.
The ambient temperature above which the LTC4085 will
begin to reduce the 0.8A charge current, is approximately
T
A
= 105°C – (5V – 3V) • 0.8A • 37°C/W
T
A
= 105°C – 1.6W • 37°C/W = 105°C – 59°C = 46°C
The LTC4085 can be used above 46°C, but the charge
current will be reduced below 0.8A. The charge current
at a given ambient temperature can be approximated by:
I
BAT
=
105°C–T
A
V
OUT
–V
BAT
()
• θ
JA
APPLICATIONS INFORMATION