Datasheet

LTC4085-3/LTC4085-4
20
408534fb
The nearest 1% value for R
NOM
is 115k. This is the value
used to bias the NTC thermistor to get cold and hot trip
points of approximately 0°C and 39°C, respectively. To
extend the delta between the cold and hot trip points, a
resistor (R1) can be added in series with R
NTC
(see Figure 4).
The values of the resistors are calculated as follows:
R
NOM
=
R
COLD
– R
HOT
2.816 – 0.484
R1=
0.484
2.816 – 0.484
⎡
⎣
⎢
⎤
⎦
⎥
•R
COLD
–R
HOT
[]
–R
HOT
where R
NOM
is the value of the bias resistor, R
HOT
and
R
COLD
are the values of R
NTC
at the desired temperature
trip points. Continuing the forementioned example with
a desired hot trip point of 50°C:
R
NOM
=
R
COLD
–R
HOT
2.816 – 0.484
=
100k •(3.266 – 0.3602)
2.816– 0.484
= 124.6k,124k nearest 1%
R1= 100k •
0.484
2.816– 0.484
⎛
⎝
⎜
⎞
⎠
⎟
•
3.266 – 0.3602
()
– 0.3602
⎡
⎣
⎢
⎢
⎢
⎤
⎦
⎥
⎥
⎥
= 24.3k
The fi nal solution is shown in Figure 4, where
R
NOM
= 124k, R1 = 24.3k and R
NTC
= 100k at 25°C
APPLICATIONS INFORMATION
Using the WALL Pin to Detect the Presence of a Wall
Adapter
The WALL input pin identifi es the presence of a wall
adapter (the pin should be tied directly to the adapter
output voltage). This information is used to disconnect the
input pin, IN, from the OUT pin in order to prevent back
conduction to whatever may be connected to the input.
It also forces the ACPR pin low when the voltage at the
WALL pin exceeds the input threshold. In order for the
presence of a wall adapter to be acknowledged, both of
the following conditions must be satisfi ed:
1. The WALL pin voltage exceeds V
WAR
(approximately
4.25V); and
2. The WALL pin voltage exceeds V
WDR
(approximately
75mV above V
BAT
)
The input power path (between IN and OUT) is re-enabled
and the ACPR pin assumes a high impedance state when
either of the following conditions is met:
1.
The WALL pin voltage falls below V
WDF
(approximately
25mV above V
BAT
); or
2.
The WALL pin voltage falls below V
WAF
(approximately
3.12V)
Each of these thresholds is suitably fi ltered in time to
prevent transient glitches on the WALL pin from falsely
triggering an event.
Power Dissipation
The conditions that cause the LTC4085 to reduce charge
current due to the thermal protection feedback can be
approximated by considering the power dissipated in the
part. For high charge currents and a wall adapter applied
to V
OUT
, the LTC4085 power dissipation is approximately:
P
D
= (V
OUT
– V
BAT
) • I
BAT