Datasheet

19
4012fa
LTC4012/
LTC4012-1/LTC4012-2
applications inForMation
The first option is to lower the power dissipation of R
CL
at
the expense of accuracy without changing the input current
limit value. The second is to make the input current limit
value programmable.
The overall accuracy of this circuit needs to be better
than the power source current tolerance or be margined
such that the worse-case error remains under the power
source limits.
The accuracy of the Figure 7 circuit is a function of the
INTV
DD
, V
BE
, R
CL
, R
F
, R1 and R3 tolerances. To improve
accuracy, the tolerance of R
F
should be changed from
5.1k, 5% to a 2.49k 1% resistor. R
CL
and the programming
resistors R1 and R3 should also be 1% tolerance such
that the dominant error is INTV
DD
(±3%). Bias resistor R2
can be 5%. When choosing NPN transistors, both need
to have good gain (>100) at 10µA levels. Low gain NPNs
will increase programming errors. Q1 must be a matched
NPN pair. Since R
F
has been reduced in value by half, the
capacitor value of C
F
should double to 0.22µF to remain
effective at filtering out any noise.
If you wish to reduce R
CL
power dissipation for a given
current limit, the programming equation becomes:
R
mV
k
R
I
CL
LIM
=
100
5 2 49
1
.
If you wish to make the input current limit programmable,
the equation becomes:
I
mV
k
R
R
LIM
CL
=
100
5 2 49
1
.
The equation governing R2 for both applications is based
on the value of R1. R3 should always be equal to R1.
R2 = 0.875 • R1
Figure 8. PROG Voltage Buffer
17
13
INTV
DD
PROG
<30nA
LTC4012
4012 F08
TO SYSTEM
MONITOR
+
In many notebook applications, there are situations
where two different I
LIM
values are needed to allow two
different power adapters or power sources to be used.
In such cases, start by setting R
LIM
for the high power
I
LIM
configuration and then use Figure 7 to set the lower
I
LIM
value. To toggle between the two I
LIM
values, take
the three ground connections shown in Figure 7, combine
them into one common connection and use a small-signal
NFET (2N7002) to open or close that common connec-
tion to circuit ground. When the NFET is off, the circuit
is defeated (floating) allowing I
LIM
to be the maximum
value. When the NFET is on, the circuit will become active
and I
LIM
will drop to the lower set value.
Monitoring Charge Current
The PROG pin voltage can be used to indicate charge cur-
rent where 1.2085V indicates full programmed current (1C)
and zero charge current is approximately equal to R
PROG
11.67µA. PROG voltage varies in direct proportion to the
charge current between this zero-current (offset) value and
1.2085V. When monitoring the PROG pin voltage, using a
buffer amplifier as shown in Figure 8 will minimize charge
current errors. The buffer amplifier may be powered from
the INTV
DD
pin or any supply that is always on when the
charger is on.