Datasheet

4
LTC4011
4011fa
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Charger Timing
∆t
TIMER
Internal Time Base Error ● –10 10 %
∆t
MAX
Programmable Timer Error R
TIMER
= 49.9k ● –20 20 %
PowerPath Control
V
FR
INFET Forward Regulation Voltage DCIN – V
CC
● 30 55 100 mV
V
OL(INFET)
Output Voltage Low V
CC
– INFET, No Load ● 3.75 5.2 7 V
V
OH(INFET)
Output Voltage High V
CC
– INFET, No Load ● 050mV
t
OFF(INFET)
INFET OFF Delay Time C
LOAD
= 10nF, INFET to 50% 3 15 µs
Status and Chemistry Select
V
OL
Output Voltage Low (I
LOAD
= 10mA) V
CDIV
● 435 700 mV
All Other Status Outputs
● 300 600 mV
I
LKG
Output Leakage Current All Status Outputs Inactive, V
OUT
= V
CC
● –10 10 µA
I
IH(VCDIV)
Input Current High V
CDIV
= V
BAT
(Shutdown) ● –1 1 µA
V
IL
Input Voltage Low CHEM (NiMH) ● 900 mV
V
IH
Input Voltage High CHEM (NiCd) ● 2.85 V
I
IL
Input Current Low CHEM = GND ● –20 –5 µA
I
IH
Input Current High CHEM = 3.3V ● –20 20 µA
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= 12V, BAT = 4.8V, GND = PGND = 0V, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC4011C is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the 0°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: Operating junction temperature T
J
(in °C) is calculated from the
ambient temperature T
A
and the total continuous package power
dissipation P
D
(in watts) by the formula:
T
J
= T
A
+ θ
JA
• P
D
Refer to the Applications Information section for details. This IC includes
overtemperature protection that is intended to protect the device during
momentary overload conditions. Junction temperature will exceed 125°C
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may result in
device degradation or failure.
Note 4: All current into device pins is positive. All current out of device
pins is negative. All voltages are referenced to GND, unless otherwise
specified.
Note 5: These limits are guaranteed by correlation to wafer level
measurements.
Note 6: Output current may be limited by internal power dissipation. Refer
to the Applications Information section for details.
Note 7: Either TGATE V
OH
may apply for 7.5V < V
CC
< 9V.
Note 8: These limits apply specifically to the thermistor network shown in
Figure 5 in the Applications Information section with the values specified
for a 10k NTC (β of 3750). Limits are then guaranteed by specific V
TEMP
voltage measurements during test.