Datasheet

18
LTC4001
4001f
Layout Considerations
Switch rise and fall times are kept under 5ns for maximum
efficiency. To minimize radiation, the SW pin and input
bypass capacitor leads (between PV
IN
and PGND) should
be kept as short as possible. A ground plane should be
used under the switching circuitry to prevent interplane
coupling. The Exposed Pad must be connected to the
ground plane for proper power dissipation. The other
paths contain only DC and/or 1.5MHz tri-wave ripple
current and are less critical.
Figure 8. 2A Li-Ion Battery Charger with 3Hr Timer, Temperature
Qualification, Soft-Start, Remote Sensing and C/10 Indication
With the exception of the input and output filter capacitors
(which should be connected to PGND) all other compo-
nents that return to ground should be connected to
GNDSENS.
Recommended Components Manufacturers
For a list of recommend component manufacturers, con-
tact the Linear Technology application department.
APPLICATIO S I FOR ATIO
WUUU
+
PROG
EN
FAULTTO µP
FROM µP
NTC
CHRG
PGND
PV
IN
V
INSENSE
BAT
BATSENS
IDET TIMER
R4
549
C2
0.22µF
C3
0.1µF
L1: VISHAY DALE IHLP-2525AH-01
R3: NTC VISHAY DALE NTHS0603N02N1002J
C4
10µF
4001 F08
2AHr
4.2V
Li-Ion
C1
10µF
D1
LED
V
IN
4.5V TO 5.5V
SS
SW SENSE
LTC4001
L1
1.5µH
GNDSENS
R2
1k
R1
10k
R3
10k
AT 25°C
R5
549