Datasheet

LTC4000-1
8
40001fa
For more information www.linear.com/LTC4001-1
pin FuncTions
VM (Pin 1/Pin 25): Voltage Monitor Input. High impedance
input to an accurate comparator with a 1.193V threshold
(typical). This pin controls the state of the RST output
pin. Connect a resistor divider (R
VM1
, R
VM2
) between the
monitored voltage and GND, with the center tap point con-
nected to this pin. The falling threshold of the monitored
voltage is calculated as follows:
V
VM _RST
=
R
VM1
+R
VM2
R
VM2
1.193V
where R
VM2
is the bottom resistor between the VM pin
and GND. Tie to the BIAS pin if voltage monitoring func-
tion is not used.
RST (Pin 2/Pin 26): High Voltage Open Drain Reset Output.
When the voltage at the VM pin is below 1.193V, this status
pin is pulled low. When driven low, this pin can disable
a DC/DC converter when connected to the converter’s
enable pin. This pin can also drive an LED to provide a
visual status indicator of a monitored voltage. Short this
pin to GND when not used.
IIMON (Pin 3/Pin 27): Input Current Monitor. The voltage
on this pin is 20 times (typical) the sense voltage (V
IN,CLN
)
across the input current sense resistor(R
IS
), therefore
providing a voltage proportional to the input current.
Connect an appropriate capacitor to this pin to obtain a
voltage representation of the time-average input current.
Leave this pin open when input current monitoring func-
tion is not needed.
IFB (Pin 4/Pin 28): Input Voltage Feedback Pin. This pin is
a high impedance input pin used to sense the input voltage
level. In regulation, the input voltage loop sets the voltage
on this
feedback pin to 1.000V. When the input feedback
voltage drops below 1.000V, the ITH pin is pulled down
to reduce the load on the input source. Connect this pin
to the center node of a resistor divider between the IN
pin and GND to set the input voltage regulation level. This
regulation level can then be obtained as follows:
V
IN_REG
=
R
OFB1
R
OFB2
+1
1.000V
If the input voltage regulation feature is not used, connect
the IFB pin to the BIAS pin.
ENC (Pin 5/Pin 1): Enable Charging Pin. High impedance
digital input pin. Pull this pin above 1.5V to enable charg-
ing and below 0.5V to disable charging. Leaving this pin
open causes the internalA pull-up current to pull the
pin to 2.5V (typical).
IBMON (Pin 6/Pin 2): Battery Charge Current Monitor. The
voltage on this pin is 20 times (typical) the sense voltage
(V
CSP,CSN
) across the battery current sense resistor (R
CS
),
therefore providing a voltage proportional to the battery
charge current. Connect an appropriate capacitor to this
pin to obtain a voltage representation of the time-average
battery charge current. Short this pin to GND to disable
charge current limit feature.
CX (Pin 7/Pin 3): Charge Current Termination Pro-
gramming. Connect the charge current termination pro-
gramming resistor (R
CX
) to this pin. This pin is a high
impedance input to a comparator and sourcesA of
current. When the voltage on this pin is greater than the
charge current monitor voltage (V
IBMON
), the CHRG pin
turns high impedance indicating that the CX threshold is
reached.
When this occurs, the charge current is imme-
diately terminated if the TMR pin is shorted to the BIAS
pin, otherwise charging continues until the charge termi-
nation timer expires. The charge current termination value
is determined using the following formula:
I
C/X
=
0.25µA R
CX
( )
0.5mV
R
CS
Where R
CS
is the sense resistor connected to the CSP
and the CSN pins. Note that if R
CX
= R
CL
≤ 19.1kΩ, where
R
CL
is the charge current programming resistor, then the
charge current termination value is one tenth the full charge
current, more familiarly known as C/10. Short this pin to
GND to disable CX termination.
CL (Pin 8/Pin 4): Charge Current Limit Programming. Con-
nect the charge current programming resistor (R
CL
) to this
pin. This pin sources 50µA of current. The regulation loop
compares the voltage on this pin with the charge current
monitor voltage (V
IBMON
), and drives the ITH pin accord-
ingly to ensure that the programmed charge current limit
(QFN/SSOP)