Datasheet
LTC4000-1
33
40001fa
For more information www.linear.com/LTC4001-1
applicaTions inForMaTion
APPENDIX—THE LOOP TRANSFER FUNCTIONS
When a series resistor (R
C
) and capacitor (C
C
) is used
as the compensation network as shown in Figure 19, the
transfer function from the input of A4-A7 to the ITH pin
is simply as follows:
V
ITH
V
FB
(s)= g
m4-7
R
C
–
1
g
m10
C
C
s+1
R
O4-7
• C
C
s
where g
m4-7
is the transconductance of error amplifier A4-
A7, typically 0.5mA/V; g
m10
is the output amplifier (A10)
transconductance, R
O4-7
is the output impedance of the
error amplifier, typically 50MΩ; and R
O10
is the effective
output impedance of the output amplifier, typically 10MΩ
with the ITH pin open circuit.
Note this simplification is valid when g
m10
• R
O10
• R
O4-7
• C
C
= A
V10
• R
O4-7
• C
C
is much larger than any other
poles or zeroes in the system. Typically A
V10
• R
O4-7
= 5 •
10
10
with the ITH pin open circuit. The exact value of g
m10
and R
O10
depends on the pull-up current and impedance
connected to the ITH pin respectively.
In most applications, compensation of the loops involves
picking the right values of R
C
and C
C
. Aside from picking
the values of R
C
and C
C
, the value of g
m10
may also be
adjusted. The value of g
m10
can be adjusted higher by
increasing the pull-up current into the ITH pin and its
value can be approximated as:
g
m10
=
I
ITH
+ 5µA
50mV
The higher the value of g
m10
, the smaller the lower limit
of the value of R
C
would be. This lower limit is to prevent
the presence of the right half plane zero.
Even though all the loops share this transfer function from
the error amplifier input to the ITH pin, each of the loops
has a slightly different dynamic due to differences in the
feedback signal path.
The Input Voltage Regulation Loop
The feedback signal for the input voltage regulation loop
is the voltage on the IFB pin, which is connected to the
center node of the resistor divider between the input
voltage (connected to the IN pin) and GND. This voltage
is compared to an internal reference (1.000V typical) by
the transconductance error amplifier A4. This amplifier
then drives the output transconductance amplifier (A10)
to appropriately adjust the voltage on the ITH pin driving
the external DC/DC converter to regulate the output volt-
age observed by the IFB pin. This loop is shown in detail
in Figure 28.
Assuming R
IS
<< R
IN
<< (R
IFB1
+ R
IFB2
), the simplified
loop transmission is as follows:
L
IV
(s) = g
m4
R
C
–
1
g
m10
C
C
s +1
C
C
s
• Gmi
p
(s)•
R
IN
R
IN
C
IN
+C
CLN
( )
s +1
•
R
IFB2
R
IFB
where Gmi
p
(s) is the transfer function from V
ITH
to the
input current of the external DC/DC converter, R
IN
is the
equivalent output impedance of the input source, and
R
IFB
= R
IFB1
+ R
IFB2
.
Figure 28. Simplified Linear Model of the Input Voltage
Regulation Loop
IN
CC
1V
ITH
LTC4000-1
IN CLN
R
IS
DC/DC INPUT
C
CLN
(OPTIONAL)
IFB
C
IN
–
+
–
+
C
C
TO DC/DC
40001 F28
R
C
R
IFB2
R
IFB1
A4
g
m4
= 0.5m
A10
g
m10
= 0.1m
R
O4
R
O10