Datasheet

LTC4000-1
10
40001fa
For more information www.linear.com/LTC4001-1
CSN (Pin 19/Pin 15): Charge Current Sense Negative Input
and Battery Ideal Diode Cathode. Connect a sense resistor
between this pin and the CSP pin. The LTC4000-1 senses
the voltage across this sense resistor and regulates it to a
voltage equal to 1/20th (typical) of the voltage set at the
CL pin. The maximum regulated sense voltage is 50mV.
The CSN pin is also the cathode input of the battery ideal
diode driver (the anode input is the BAT pin). Tie this pin
to the CSP pin if no charge current limit is desired. Refer to
the Applications Information section for complete details.
CSP (Pin 20/Pin 16): Charge Current Sense Positive Input
and Input Ideal Diode Cathode. Connect a sense resis-
tor between this pin and the CSN pin for charge current
sensing and regulation. This input should be tied to CSN
to disable the charge current regulation function. This
pin is also the cathode of the input ideal diode driver (the
anode is the IID pin).
OFB (Pin 21/Pin 17): Output Feedback Voltage Pin. This
pin is a high impedance input pin used to sense the output
voltage level. In regulation, the output voltage loop sets the
voltage on
this feedback pin to 1.193V. Connect this pin
to
the center node of a resistor divider between the CSP
pin and the FBG pin to set the output voltage when battery
charging is terminated and all the output load current is
provided from the input. The output voltage can then be
obtained as follows:
V
OUT
=
R
OFB2
+
R
OFB1
R
OFB2
1.193V
When charging a heavily discharged battery (such that V
OFB
< V
OUT(INST_ON)
), the battery PowerPath PMOS connected
to BGATE is regulated to set the voltage on this feedback
pin to 0.974V (approximately 86% of the battery float
voltage). The instant-on output voltage is then as follows:
V
OUT(INST _ON)
=
R
OFB2
+
R
OFB1
R
OFB2
0.974V
IGATE (Pin 22/Pin 18): Input PMOS Gate Drive Output. The
IGATE pin drives the external PMOS to behave as an ideal
diode from the IID pin (anode) to the CSP pin (cathode)
when the voltage at the IN pin is within its operating range
(3V to 60V). To ensure that the input PMOS is turned off
when the IN pin voltage is not within its operating range,
connect a 10M resistor from this pin to the CSP pin.
IID (Pin 23/Pin 19): Input Ideal Diode Anode. This pin is
the anode of the input ideal diode driver (the cathode is
the CSP pin).
ITH (Pin 24/Pin 20): High Impedance Control Voltage Pin.
When any of the regulation loops (input voltage, charge
current, battery float voltage or the output voltage) indicate
that its limit is reached, the ITH pin will sink current (up to
1mA) to regulate that particular loop at the limit. In many
applications, this ITH pin is connected to the control/
compensation node of a DC/DC converter. Without any
external pull-up, the operating voltage range on this pin
is GND to 2.5V. With an external pull-up, the voltage on
this pin can
be pulled up to 6V. Note that the impedance
connected
to this pin affects the overall loop gain. For
details, refer to the Applications Information section.
CC (Pin 25/Pin 21): Converter Compensation Pin. Connect
an R-C network from this pin to the ITH pin to provide a
suitable loop compensation for the converter used. Refer
to the Applications Information section for discussion and
procedure on choosing an appropriate R-C network for a
particular DC/DC converter.
CLN (Pin 26/Pin 22): Input Current Sense Negative Input.
Connect a sense resistor between this pin and the IN pin. The
LTC4000-1 senses the voltage across this sense resistor
and sets the voltage on the IIMON pin equal to 20 times
this voltage. Tie this pin to the IN pin if the input current
monitoring feature is not used. Refer to the Applications
Information section for complete details.
IN (Pin 27/Pin 23): Input Supply Voltage: 3V to 60V.
Supplies power to the internal circuitry and the BIAS pin.
Connect the power source to the downstream system and
the battery charger to this pin. This pin is also the positive
sense pin for the input current monitor. Connect a sense
resistor between this pin and
the CLN pin. Tie this pin to
CLN if the input current monitoring feature is not used. A
local 0.1µF bypass capacitor to ground is recommended
on this pin.
pin FuncTions
(QFN/SSOP)