Datasheet

LTC3883/LTC3883-1
59
3883fa
For more information www.linear.com/LTC3883
Figure 29. LT C Controller Connection
APPLICATIONS INFORMATION
V
DD
node because this will interfere with bus communica-
tion in the absence of system power. If V
IN
is applied the
dongle will not supply the LTC3883s on the board. It is
recommended the RUN pins be held low to avoid providing
power to the load until the part is fully configured.
The LTC controller I
2
C connections are opto-isolated from
the PC USB. The 3.3V from the controller and the LTC3883
V
DD33
pin must be driven to each LTC3883 with a separate
PFET. If V
IN
is not applied, the V
DD33
pins can be in parallel
because the on-chip LDO is off. The controller 3.3V cur-
rent limit
is 100mA but typical V
DD33
currents are under
15mA. The V
DD33
does back drive the INTV
CC
/EXTV
CC
pin.
Normally this is not an issue if V
IN
is open.
INDUCTOR DCR AUTO CALIBRATION
Using the DC resistance of the inductor as a current shunt
element has several advantages—no additional power
loss, lower circuit complexity and cost. However any error
between the specified nominal inductor DCR value and
the actual DCR value will cause a proportional error
in the
peak current limit, as well as the output current read-back
value. The LTC3883 can calibrate the inductor DCR value
to compensate for the tolerance from its typical value.
Setting bit 3 of the MFR_PWM_MODE_3883 command
will start the calibration procedure. To successfully
complete the calibration procedure, the PWM must be
enabled, the DUTY_CYCLE value must be at least 3%, the
READ_IIN value must be at least 10mA, and the calibrated
IOUT_CAL_GAIN must be with ±30% of the uncalibrated
IOUT_CAL_GAIN value. If any of the above conditions are
not met, bit 0 of the STATUS_CML command will be set,
and the value of IOUT_CAL_GAIN will not be changed.
During the inductor DCR calibration the supply voltage,
output voltage, and load current must be in a steady state
condition for 180ms during the command execution to
ensure accurate calibration. The load current should be
sufficiently large to create at least a 6mV average signal
across the R
IINSNS
sense resistor as well as 6mV across
the output current sense network in order to ensure that
the READ_IIN and READ_IOUT values used in the DCR
calibration calculation are within 1% TUE
. The inductor
DCR is calibrated by multiplying the measured READ_IIN
value by the measured READ_DUTY_CYCLE value to obtain
a calculated output current. The LTC3883 then updates the
IOUT_CAL_GAIN value so that the measured READ_IOUT
value matches the calculated output current value that is
based on power stage input current and duty cycle, so
that READ_IOUTDUTY_CYCLE = READ_IIN.
V
IN
V
IN
V
DD33
V
DD25
SDA
F
F
VGS MAX ON THE TP0101K IS 8V IF V
IN
> 16V
CHANGE THE RESISTOR DIVIDER ON THE PFET GATE
F
F
3883 F29
10k
100k
TP0101K
ISOLATED
3.3V
SDA
SCL
TP0101K
100k
LT C
CONTROLLER
HEADER
TO LTC DC1613
USB TO I
2
C/SMBus/PMBus
CONTROLLER
SCL
WP SGND
LTC3883
V
IN
V
DD33
SDA
SCL
WP SGND
LTC3883
10k
V
DD25