Datasheet

LTC3880/LTC3880-1
62
3880fc
For more information www.linear.com/LTC3880
Figure 31. Example of a Command Write of VOUT_COMMAND
// wait until bits 6, 5, and 4 of MFR_COMMON are all set
do
{
mfrCommonValue = PMBUS_READ_BYTE(0xEF);
partReady = (mfrCommonValue & 0x68) == 0x68;
}
while(!partReady)
// n
ow the part is ready to receive the next command
PMBUS_WRITE_WORD(0x21, 0x2000); //write VOUT_COMMAND to 2V
APPLICATIONS INFORMATION
power off/on, moving to a new output voltage set point,
etc.) it will clear bit 4 of MFR_COMMON (‘output not in
transition’). When internal calculations are in process, the
part will clear bit5 of MFR_COMMON (‘calculations not
pending’). These three status bits can be polled with a
PMBus read byte of the MFR_COMMON register until all
three bits are set. A command immediately following the
status bits being set will be accepted without NACKing or
It is recommended that all command writes (write byte,
write word, etc.) be preceded with a polling loop to avoid
the extra complexity of dealing with busy behavior and
unwanted ALERTB notification. A simple way to achieve
this is to create a SAFE_WRITE_BYTE() and SAFE_WRITE_
WORD() subroutine. The above polling mechanism allows
your software to remain clean and simple while robustly
communicating with the part. For a detailed discussion
of these topics and other special cases please refer to
the application note section located at www.linear.com/
designtools/app_notes.
When communicating using bus speeds at or below
100kHz, the polling mechanism shown here provides a
simple solution that ensures robust communication without
clock stretching. At bus speeds in excess of 100kHz, it is
strongly recommended that the part be configured to en
-
able clock stretching. This requires a PMBus master that
supports clock stretching. System software that detects
and properly
recovers from the standard PMBus NACK/
BUSY faults as described in the PMBus Specification v1.1,
Part II, Section 10.8.7 is required to communicate above
100kHz without clock stretching.
generating a BUSY fault/ALERT notification. The part can
NACK commands for other reasons, however, as required
by the PMBus spec (for instance, an invalid command or
data). An example of a robust command write algorithm
for the VOUT_COMMAND register is provided in Figure 31.