Datasheet

LTC3880/LTC3880-1
61
3880fc
For more information www.linear.com/LTC3880
APPLICATIONS INFORMATION
environment that supports Linear Technology digital
power ICs including the LTC3880. The software supports
a variety of different tasks. LTpowerPlay can be used to
evaluate Linear Technology ICs by connecting to a demo
board or the user application. LTpowerPlay can also be
used in an offline mode (with no hardware present) in
order to build multiple IC configuration files that can be
saved and re-loaded at a later time. LTpowerPlay provides
unprecedented diagnostic and debug features. It becomes
a valuable diagnostic tool during board bring-up to pro
-
gram or tweak the power system or to diagnose power
issues when bring up rails. LTpowerPlay utilizes Linear
T
echnology’s USB-to-I
2
C/SMBus/PMBus controller to
communication with one of the many potential targets
including the DC1590B-A/B demo board, the DC1709A
socketed programming board, or a customer target
system. The software also provides an automatic update
feature to keep the revisions current with the latest set of
device drivers and documentation. A great deal of context
sensitive help is available with LTpowerPlay along with
several tutorial demos. Complete information is available at
http://www.linear.com/ltpowerplay.
PMBus COMMUNICATION AND COMMAND
PROCESSING
The LTC3880/LTC3880-1 have a one deep buffer to hold
the last data written for each supported command prior
to processing as shown in Figure 30; Write Command
Data Processing. When the part receives a new command
from the bus, it copies the data into the Write Command
Data Buffer, indicates to the internal processor that this
command data needs to be fetched, and converts the
command to its internal format so that it can be executed.
Two distinct parallel blocks manage command buffering
and command processing (fetch, convert, and execute)
to ensure the last data written to any command is never
lost. Command data buffering handles incoming PMBus
writes by storing the command data to the Write Com
-
mand Data Buffer and marking these commands for future
processing. The internal processor runs in parallel and
handles the sometimes slower task of fetching, convert
-
ing and executing commands marked for processing.
Some computationally intensive commands (e.g., timing
parameters, temperatures, voltages and currents) have
internal processor execution times that may be long relative
to PMBus timing. If the part is busy processing a command,
and new command(s) arrive, execution may be delayed
or processed in a different order than received. The part
indicates when internal calculations are in process via bit5
of MFR_COMMON (‘calculations not pending’). When the
part is busy calculating, bit 5 is cleared. When this bit is
set, the part is ready for another command. An example
polling loop is provided in Figure 30 which ensures that
commands are processed in order while simplifying error
handling routines.
When the part receives a new command while it is busy,
it will communicate this condition using standard PMBus
protocol. Depending on part configuration it may either
NACK the command or return all ones (0xFF) for reads. It
may also generate a BUSY fault and ALERT notification,
or stretch the SCL clock low. For more information refer
to PMBus Specification v1.1, Part II, Section 10.8.7 and
SMBus v2.0 section 4.3.3. Clock stretching can be enabled
by asserting bit 1 of MFR_CONFIG_ALL_LTC3880. Clock
stretching will only occur if enabled and the bus com
-
munication speed exceeds 100kHz.
PMBus busy protocols are well accepted standards, but
can make writing system level software somewhat com
-
plex. The part provides three ‘hand shaking’ status bits
which reduce complexity while enabling robust system
level communication.
The three hand shaking status bits are in the MFR_
COMMON register. When the part is busy executing an
internal operation, it will clear bit 6 of MFR_COMMON
(‘chip not busy’). When the part is busy specifically be
-
cause it is in a transitional VOUT state (margining hi/lo,
DECODER
CMD
INTERNAL
PROCESSOR
WRITE COMMAND
DATA BUFFER
PAGE
CMDS
0x00
0x21
0xFD
3880 F30
x1
•
•
•
•
•
•
MFR_RESET
VOUT_COMMAND
S
CALCULATIONS
PENDING
PMBus
WRITE
R
FETCH,
CONVERT
DATA
AND
EXECUTE
DATA
MUX
Figure 30. Write Command Data Processing