Datasheet

LTC3880/LTC3880-1
47
3880fc
For more information www.linear.com/LTC3880
APPLICATIONS INFORMATION
ripple current by a factor of 30% to 70% when compared
to a single phase power supply solution.
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (V
OUT
)/(V
IN
). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
C
IN
Required I
RMS
≈
I
MAX
V
IN
V
OUT
( )
V
IN
– V
OUT
( )




1/2
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT
/2. This simple worst-case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that capacitor manufacturers’
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the capaci
-
tor
, or to choose a capacitor rated at a higher temperature
than required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the L
TC3880, ceramic capacitors
can also be used for C
IN
. Always consult the manufacturer
if there is any question.
The benefit of the LTC3880 2-phase operation can be
calculated by using the equation above for the higher
power controller and then calculating the loss that would
have resulted if both controller channels switched on at
the same time. The total RMS power lost is lower when
both controllers are operating due to the reduced overlap
of current pulses required through the input capacitor’s
ESR. This is why the input capacitor’s requirement cal
-
culated above for the worst-case controller is adequate
for the dual controller design. Also, the input protection
fuse resistance, batter
y resistance, and PC board trace
resistance losses are also reduced due to the reduced
peak currents in a 2-phase system. The overall benefit
of a multiphase design will only be fully realized when
the sour
ce impedance of the power supply/battery is
included in the efficiency testing. The sources of the top
MOSFETs should be placed within 1cm of each other and
share a common C
IN
(s). Separating the sources and C
IN
may produce undesirable voltage and current resonances
at V
IN
.
A small (0.1µF to 1µF) bypass capacitor between the chip
V
IN
pin and ground, placed close to the LTC3880, is also
suggested. A 2.2Ω – 10Ω resistor placed between C
IN
(C1) and the V
IN
pin provides further isolation between
the two channels.
The selection of C
OUT
is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
output ripple (∆V
OUT
) is approximated by:
∆V
OUT
≈I
RIPPLE
ESR+
1
8fC
OUT






where f is the operating frequency, C
OUT
is the output
capacitance and I
RIPPLE
is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since I
RIPPLE
increases with input voltage.
FAULT CONDITIONS
The LTC3880 GPIOn pins are configurable to indicate a
variety of faults including OV/UV, OC, OT, timing faults,
peak overcurrent faults. In addition the GPIOn pins can
be pulled low by external sources indicating a fault in
some other portion of the system. The fault response is
configurable and allow the following options:
n
Ignore
n
Shut Down Immediately—Latch Off
n
Shut Down Immediately—Retry Indefinitely at the Time
Interval Specified in MFR_RETRY_DELAY
Refer to the PMBus section of the data sheet and the
PMBus specification for more details.
The OV response is automatic and virtually immediate. If
an OV is detected, TG goes low and BG is asserted.
Fault logging is available on the LTC3880. The fault log
-
ging is configurable to automatically store data when a
fault occurs that causes the unit to fault off. The header
portion of the fault logging table contains peak values. It
is possible to read these values at any time. This data will
be useful while troubleshooting the fault.