Datasheet

LTC3880/LTC3880-1
23
3880fc
For more information www.linear.com/LTC3880
OPERATION
RCONFIG (RESISTOR CONFIGURATION) PINS
There are six input pins utilizing 1% resistor dividers be-
tween V
DD25
and SGND to select key operating parameters.
The pins are ASEL, FREQ_CFG, V
OUT0_CFG
, V
OUT1_CFG
,
V
TRIM0_CFG
and V
TRIM1_CFG
. If pins are floated, the value
stored in the corresponding NVM command is used. If
bit 6 of the MFR_CONFIG_ALL_LTC3880 configuration
command is asserted in NVM, the resistor inputs are
ignored upon power-up except for ASEL which is always
respected. The resistor configuration pins are only mea
-
sured during a power-up reset or after an MFR_RESET
command is executed.
The V
OUTn_CFG
and V
TRIMn
pin settings are described in
Tables 12 and 13. These pins select the output voltages
for the LTC3880’s analog PWM controllers. If both pins
are open, the VOUT_COMMAND command is loaded from
NVM to determine the output voltage.
The following parameters are set as a percentage of the
output voltage if the RCONFIG pins are used to determined
output voltage:
n
VOUT_OV_FAULT_LIMIT .................................... +10%
n
VOUT_OV_WARN .............................................. +7.5%
n
VOUT_MAX....................................................... +7.5%
n
VOUT_MARGIN_HI ..............................................+5%
n
POWER_GOOD_ON .............................................–7%
n
POWER_GOOD_OFF ............................................–8%
n
VOUT_MARGIN_LO .............................................–5%
n
VOUT_UV_WARN ..............................................–6.5%
n
VOUT_UV_FAULT_LIMIT ......................................–7%
The FREQ_CFG pin settings are described in Table 14. This
pin selects the switching frequency and phase relationships
between the two channels and SYNC pin. To synchronize to
an external clock, the part must be put into external clock
mode (FREQ_CFG pin shorted to ground). If no external
clock is supplied, the part will clock at the lowest free-
running frequency of the internal PWM oscillator. This low
clock rate will increase the ripple current of the inductor
possibly producing undesirable operation. If the external
SYNC signal is missing or misbehaving, a “PLL Lock Sta
-
tus” fault will be indicated in the STATUS_MFR_SPECIFIC
command. If the user does not wish to see the PLL_F
AUL
T
even if there is not a valid synchronization signal at power
up, bit 3 of the MFR_CONFIG_ALL_LTC3880 command
must be asserted. If the SYNC pin is connected between
multiple ICs only one of the ICs can be the oscillator, all
other ICs must be configured to external clock.
The ASEL pin settings are described in Table 15. This
pin selects the bottom 4 bits of the slave address for the
LTC3880. The 3 most significant bits are retrieved from
the NVM MFR_ADDRESS command. If the pin is floating,
the 7-bit value stored in NVM MFR_ADDRESS command
is used to determine the slave address. For more detail,
refer to Table 15a.
Note: Per the PMBus specification, pin programmed
parameters can be overridden by commands from the
digital interface with the exception of ASEL which is
always honored. Do not set any part address to 0x5A or
0x5B because these are global addresses and all parts
will respond to them.
FAULT DETECTION AND HANDLING
A variety of fault and warning reporting and handling
mechanisms are available. Fault and warning detection
capabilities include:
n
Input OV/FAULT Protection and UV Warning
n
Average Input OC Warn
n
Output OV/UV Fault and Warn Protection
n
Output OC Fault and Warn Protection
n
Internal and External Overtemperature Fault Protection
n
External Undertemperature Fault and Warn Protection
n
CML Fault (Communication, Memory or Logic)
n
External Fault Detection via the Bidirectional GPIOn
Pins.
In addition, the LTC3880 can map any combination of fault
indicators to their respective GPIOn pin using the propagate
GPIOn response commands, MFR_GPIO_PROPAGATE_
LTC3880. Typical usage of a GPIO pin is as a driver for an
external crowbar device, overtemperature alert, overvoltage
alert or as an interrupt to cause a microcontroller to poll
the fault commands. Alternatively, the GPIOn pins can be