Datasheet

LTC3880/LTC3880-1
19
3880fc
For more information www.linear.com/LTC3880
OPERATION
SEQUENCING
The default mode for sequencing the outputs on and off is
time based. Each output is enabled after waiting TON_DE
-
LAY amount of time following either a RUN pin going high,
a PMBus command to turn on or the V
IN
rising above a
preprogrammed voltage. Off sequencing is handled in a
similar way. To assure proper sequencing, make sure all
ICs connect the SHARE_CLK pin together and RUN pins
together. If the RUN pins can not be connected together for
some reason, set bit 2 of MFR_CHAN_CONFIG_LTC3880
to a 1. This bit requires the SHARE_CLK pin to be clocking
before the power supply output can start. When the RUN pin
is pulled low, the LTC3880 will hold the pin low for the MFR_
RESTART_DELAY. The minimum MFR_RESTART_DELAY
is TOFF_DELAY + TOFF_FALL + 136ms. This delay assures
proper sequencing of all rails. The LTC3880 calculates
this delay internally and will not process a shorter delay.
However, a longer commanded MFR_RESTART_DELAY
will be used by the part. The maximum allowed value is
65.52 seconds.
VOLTAGE-BASED SEQUENCING
The GPIOn pins can be asserted when the UV threshold is
exceeded for each output. It is possible to feed the GPIO
pin from one output into the RUN pin of the next output
in the sequence. To use the GPIOn pin for voltage based
sequencing, set bit 12 of the MFR_GPIOn_PROPAGATE
command = 1. Bit 12 is the VOUT_UVUF which is the
unfiltered VOUT_UV comparator. Using the unfiltered
VOUT_UV fault limit is recommended because there is little
appreciable time delay between the comparator crossing
the UV threshold and the GPIO pin releasing This can be
implemented across multiple LTC3880s. The VOUT_UVUF
has a 250µs filter. If the V
OUT
voltage bounces around the
UV threshold for a long period of time it is possible for
the GPIO output to toggle more than once. To minimize
this problem, set the TON_RISE time under 100ms. If a
fault in the string of rails is detected, only the faulted rail
and downstream rails will fault off. The rails in the string
of devices in front of the faulted rail will remain on unless
commanded off.
SHUTDOWN
The LTC3880 supports two shutdown modes. The first
mode is closed-loop shutdown response, with user-
defined turn-off delay (TOFF_DELAY) and ramp down
rate (TOFF_F
ALL). The controller will maintain the mode
of operation for TOFF_F
ALL. In discontinuous conduction
mode, the controller will not draw current from the load
and the fall time will be set by the output capacitance and
load current.
The other shutdown mode occurs in response to a fault
condition or loss of SHARE_CLK (if bit 2 of MFR_CHAN_
CONFIG_LTC3880 is set to a 1) or V
IN
falling below the
VIN_OFF threshold or GPIO pulled low externally (if the
MFR_GPIO_RESPONSE is set to inhibit). Under these
conditions the power stage is disabled in order to stop
the transfer of energy to the load as quickly as possible.
The shutdown state can be entered from the soft-start or
active regulation states either through user intervention
(deasserting RUNn or the PMBus OPERATION command)
or in response to a detected fault or an external fault via
the bidirectional GPIOn pins, or loss of SHARE_CLK (if
bit 2 of MFR_CHAN_CONFIG_LTC3880 is set to a 1) or
V
IN
falling below the VIN_OFF threshold.
In hiccup mode, the controller responds to a fault by
shutting down and entering the inactive state for a
programmable delay time (MFR_RETRY_DELAY). This
delay minimizes the duty cycle associated with autono-
mous retries if the fault that caused the shutdown disap-
pears once the output is disabled. The retry delay time
is
determined by the
longer of the MFR_RETRY_DELAY
command or the time required for the regulated output
to decay below 12.5% of the programmed value. If
LTC3880
Voltage Based Sequencing by Cascading GPIOs into RUN Pins
GPIO0 = V
OUT0_UVUF
GPIO1 = V
OUT1_UVUF
RUN 1
RUN 0
START
LTC3880
3880 F02
RUN 0 GPIO0 = V
OUT0_UVUF
GPIO1 = V
OUT1_UVUF
TO NEXT CHANNEL
IN THE SEQUENCE
RUN 1
Figure 2. Event (Voltage) Based Sequencing