LTC3880/LTC3880-1 Dual Output PolyPhase Step-Down DC/DC Controller with Digital Power System Management Description Features PMBus/I2C Compliant Serial Interface – Telemetry Read Back includes VIN, IIN, VOUT, IOUT, Temperature and Faults – Programmable Voltage, Current Limit, Digital Soft-Start/Stop, Sequencing, Margining, OV/UV and Frequency Synchronization (250kHz to 1MHz) n ±0.
LTC3880/LTC3880-1 Table of Contents Features...................................................... 1 Applications................................................. 1 Typical Application......................................... 1 Description.................................................. 1 Table of Contents........................................... 2 Absolute Maximum Ratings............................... 4 Pin Configuration........................................... 4 Order Information...................
LTC3880/LTC3880-1 Table of Contents RCONFIG (External Resistor Configuration Pins).................................................. 49 Voltage Selection................................................. 49 Frequency and Phase Selection Using RCONFIG.............................................................50 Address Selection Using RCONFIG...................... 51 Efficiency Considerations........................................ 52 Checking Transient Response..................................
LTC3880/LTC3880-1 Absolute Maximum Ratings (Note 1) VIN Voltage.................................................. –0.3V to 28V Topside Driver Voltages BOOST1, BOOST0................................... –0.3V to 34V Switch Voltage (SW1, SW0)........................... –5V to 28V EXTVCC, INTVCC, (BOOST1 – SW1), (BOOST0 – SW0).......................................... –0.3V to 6V VSENSE0+, VSENSE1, ISENSE0n, ISENSE1n........... –0.3V to 6V RUN0, RUN1, SDA, SCL, ALERT................. –0.3V to 5.
LTC3880/LTC3880-1 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 12V, VRUN0,1 = 3.3V, fSYNC = 500kHz (externally driven) unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Input Voltage Range (Note 12) IQ Input Voltage Supply Current Normal Operation (Note 14) VRUN0,1 = 3.
LTC3880/LTC3880-1 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 12V, VRUN0,1 = 3.3V, fSYNC = 500kHz (externally driven) unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS OV/UV Output Voltage Supervisor Channel 0 N Resolution 8 V0RANGE0 Voltage Monitoring Range Range Value = 0 1 0.5 Bits 4.096 2.
LTC3880/LTC3880-1 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 12V, VRUN0,1 = 3.3V, fSYNC = 500kHz (externally driven) unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Voltage Readback N Resolution (Note 5) 10 VIFS Full-Scale Voltage (Note 11) 38.91 VIN_TUE Total Unadjusted Error VVIN > 4.
LTC3880/LTC3880-1 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 12V, VRUN0,1 = 3.3V, fSYNC = 500kHz (externally driven) unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ±7.
LTC3880/LTC3880-1 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 12V, VRUN0,1 = 3.3V, fSYNC = 500kHz (externally driven) unless otherwise specified.
LTC3880/LTC3880-1 Typical Performance Characteristics Efficiency vs Load Current, VOUT = 3.3V (LTC3880) 90 80 80 70 70 60 50 VIN = 12V fSW = 364kHz L = 0.56µH DCR = 1.8m CCM DCM BM 40 30 20 10 0 10 1000 10000 100 LOAD CURRENT (mA) 91.0 60 50 VIN = 12V fSW = 370kHz L = 0.56µH DCR = 1.8m CCM DCM BM 40 30 20 10 0 100000 10 1000 10000 100 LOAD CURRENT (mA) Load Step (Burst Mode Operation) 2200 2100 89.0 88.
LTC3880/LTC3880-1 Typical Performance Characteristics VOUT 1V/DIV tFALL = 5ms tDELAY = 10ms 5ms/DIV 3880 G10 60 50 40 30 20 10 0 –10 –20 VSENSE 50mV VSENSE 25mV 0 0.5 1 1.5 VITH (V) 2 MAXIMUM CURRENT SENSE THRESHOLD (mV) RUN 2V/DIV Current Sense Threshold vs ITH Voltage (Low Range) CURRENT LIMIT (A) WITH 1mΩ SENSE RESISTOR Soft-Off Ramp 2.
LTC3880/LTC3880-1 Typical Performance Characteristics VOUT Command DNL INTVCC Line Regulation 0.3 5.25 1.5 0.2 5.00 1.0 0.1 0.5 0 0 –0.1 –0.5 –0.2 –1.0 0.5 1 1.5 2 2.5 3 3.5 VOUT (V) 4 4.5 5 –0.3 5.5 4.75 INTVCC (V) DNL (LSBs) INL (LSBs) VOUT Command INL 2.0 3.75 0.5 1 1.5 2 2.5 3 3.5 VOUT (V) 4 4.5 5 3.50 5.5 1.010 VOUT OV Threshold vs Temperature (4V Target) 4.04 4.03 4V OV THRESHOLD (V) 2V OV THRESHOLD (V) 1V OV THRESHOLD (V) 2.02 0.995 2.01 2.00 1.99 1.98 90 4.
LTC3880/LTC3880-1 Typical Performance Characteristics DC Output Current Matching in a 2-Phase System (LTC3880) Dynamic Current Sharing During a Load Transient in a 4-Phase System Dynamic Current Sharing During a Load Transient in a 4-Phase System 25 CHANNEL CURRENT (A) 20 15 CURRENT 10 5A/DIV CURRENT 10 5A/DIV 0 0 10 5µs/DIV 3880 G29 5µs/DIV 3880 G30 5 0 CHAN 0 CHAN 1 0 5 25 30 10 15 20 TOTAL CURRENT (A) 35 40 3880 G28 Pin Functions VSENSE0+ (Pin 1): Channel 0 Positive Voltage Sense Inp
LTC3880/LTC3880-1 Pin Functions FREQ_CFG (Pin 17): Frequency or Phase Set/Select Pin. Connect a ±1% resistor divider between the chip VDD25 FREQ_CFG and SGND in order to select switching frequency or phase. If the pin is left open, the IC will use the value programmed in the NVM. Minimize capacitance when the pin is open to assure accurate detection of the pin state. VOUT0_CFG/VOUT1_CFG (Pin 18/Pin 19): Output Voltage Select Pin.
LTC3880/LTC3880-1 Block Diagram (One of two channels (CH0) shown) VIN 35 VIN ON/OFF + – 8-BIT VIN DAC 19R 38R R R 5V REG LTC3880 ONLY ICMP INTVCC /EXTVCC 33 VDD33 VDD33 25 BOOST0 S R Q 37 TG0 – IREV + 3k + – CIN INTVCC/EXTVCC (LTC3880-1) SGND 3.3V SUBREG PWM_CLOCK VIN + M1 SW0 ON 39 SWITCH LOGIC AND ANTISHOOTTHROUGH UV REV UVLO SS ILIM RANGE SELECT HI: 1:1 LO: 1:1.
LTC3880/LTC3880-1 Operation Overview The LTC3880 is a dual channel/dual phase, constant frequency, analog current mode controller for DC/DC stepdown applications with a digital interface. The LTC3880 digital interface is compatible with PMBus which supports bus speeds of up to 400kHz. A typical application circuit is shown on the first page of this data sheet.
LTC3880/LTC3880-1 Operation from 0V to 1.024V. The output voltage, through feedback of the EA, will be regulated to 5.5 times the DAC output (2.75 times if range = 1). The DAC value is calculated by the part to synthesize the users desired output voltage. The output voltage is programmed by the user either with the resistor configuration pins detailed in Tables 12 and 13 or by the VOUT command (either from NVM or by PMBus command).
LTC3880/LTC3880-1 Operation 2.5V, 3.3V and 5V. If VIN is below 6V, the INTVCC and VIN pins must be tied together. The controller configuration is initialized by an internal threshold based UVLO where VIN must be approximately 4V and the 5V, 3.3V and 2.5V linear regulators must be within approximately 20% of the regulated values. The LTC3880-1 does not have an internal 5V linear regulators.
LTC3880/LTC3880-1 Operation Sequencing The default mode for sequencing the outputs on and off is time based. Each output is enabled after waiting TON_DELAY amount of time following either a RUN pin going high, a PMBus command to turn on or the VIN rising above a preprogrammed voltage. Off sequencing is handled in a similar way. To assure proper sequencing, make sure all ICs connect the SHARE_CLK pin together and RUN pins together.
LTC3880/LTC3880-1 Operation multiple outputs are controlled by the same GPIO pin, the decay time of the faulted output determines the retry delay. If the natural decay time of the output is too long, it is possible to remove the voltage requirement of the MFR_RETRY_DELAY command by asserting bit 0 of MFR_CHAN_CONFIG_LTC3880.
LTC3880/LTC3880-1 Operation relationships are completely independent of each other providing the numerous application options for the user. If the LTC3880 is configured to drive the SYNC pin using the programmed FREQUENCY_SWITCH command value, the SYNC pin will pull low at the desired clock rate with 500ns low pulse. Care must be taken in the application to assure the capacitance on SYNC is minimized to assure the pull-up resistor versus the capacitor load has a low enough time constant for the application.
LTC3880/LTC3880-1 Operation near the inductor and used to modify the internal current limit circuit to maintain an essentially constant current limit with temperature. In this application, the ISENSEn+ pin is connected to the FET side of the capacitor while the ISENSEn– pin is placed on the load side of the capacitor. The current sensed from the input is then given by the expression VDCR/DCR.
LTC3880/LTC3880-1 Operation RCONFIG (Resistor Configuration) Pins There are six input pins utilizing 1% resistor dividers between VDD25 and SGND to select key operating parameters. The pins are ASEL, FREQ_CFG, VOUT0_CFG, VOUT1_CFG, VTRIM0_CFG and VTRIM1_CFG. If pins are floated, the value stored in the corresponding NVM command is used. If bit 6 of the MFR_CONFIG_ALL_LTC3880 configuration command is asserted in NVM, the resistor inputs are ignored upon power-up except for ASEL which is always respected.
LTC3880/LTC3880-1 Operation used as inputs to detect external faults downstream of the controller that require an immediate response. The GPIO0 and/or GPIO1 pins can also be configured as power good outputs. Power good indicates the controller output is above the power good threshold. At power-up the pin will initially be three-state.
LTC3880/LTC3880-1 Operation Serial Interface The LTC3880 serial interface is a PMBus compliant slave device and can operate at any frequency between 10kHz and 400kHz. The address is configurable using either the NVM or an external resistor divider. In addition the LTC3880 always responds to the global broadcast address of 0x5A (7 bit) or 0x5B (7 bit). Address 0x5A is not paged and is performed on both channels. 0x5B respects the page command.
LTC3880/LTC3880-1 OPERATION The IIN and IOUT overcurrent monitors are performed by ADC readings and calculations. Thus these values are based on average currents and can have a time latency of up to 100ms. The IOUT calculation accounts for the sense resistor and the temperature coefficient of the resistor. The input current is equal to the sum of output current times the respective channel duty cycle plus the input offset current for each channel.
LTC3880/LTC3880-1 OPERATION after TON_DELAY has been reached and a SOFT_START sequence is started. The resolution of the TON_MAX_ FAULT_LIMIT is 10µs. If the VOUT_UV_FAULT_LIMIT is not reached within the TON_MAX_FAULT_LIMIT time, the response of this fault is determined by the value of the TON_MAX_FAULT_RESPONSE command value.
LTC3880/LTC3880-1 OPERATION log data is erased, or else the part will immediately issue another fault log. When the LTC3880 powers-up, it checks the NVM for a valid fault log. If a valid fault log exists in NVM, the “Valid Fault Log” bit in the STATUS_MFR_SPECIFIC command will be set and an ALERT event will be generated. Also, fault logging will be blocked until the LTC3880 has received a MFR_FAULT_LOG_CLEAR command before fault logging will be re-enabled.
LTC3880/LTC3880-1 OPERATION SDA tf tr tLOW tSU(DAT) tHD(SDA) tf tSP tr tBUF SCL tHD(STA) tHD(DAT) tSU(STA) tHIGH tSU(STO) 3880 F05 START CONDITION REPEATED START CONDITION STOP CONDITION START CONDITION Figure 5.
LTC3880/LTC3880-1 OPERATION Table 1.
LTC3880/LTC3880-1 OPERATION 1 S 1 1 SLAVE ADDRESS Wr A COMMAND CODE A 7 1 1 8 P 3880 F11 Figure 11. Send Byte Protocol 1 S 7 1 1 8 1 SLAVE ADDRESS Wr A COMMAND CODE A 8 1 1 PEC A P 3880 F12 Figure 12. Send Byte Protocol with PEC 1 S 7 1 1 8 1 SLAVE ADDRESS Wr A COMMAND CODE A 1 7 1 1 Sr SLAVE ADDRESS Rd A 8 1 DATA BYTE LOW A 1 1 DATA BYTE HIGH A 8 P 3880 F13 Figure 13.
LTC3880/LTC3880-1 PMBus Command Summary PMBus Commands The following tables list supported PMBus commands and manufacturer specific commands. A complete description of these commands can be found in the “PMBus Power System Mgt Protocol Specification – Part II – Revision 1.1”. Users are encouraged to reference this specification. Exceptions or manufacturer specific implementations are listed below in Table 2.
LTC3880/LTC3880-1 PMBus Command Summary COMMAND NAME CMD CODE DESCRIPTION FREQUENCY_SWITCH 0x33 Switching frequency of the controller. R/W Word N L11 kHz Y 350 0xFABC 69 VIN_ON 0x35 Input voltage at which the unit should start power conversion. R/W Word N L11 V Y 6.5 0xCB40 70 VIN_OFF 0x36 Input voltage at which the unit should stop power conversion. R/W Word N L11 V Y 6.0 0xCB00 70 IOUT_CAL_GAIN 0x38 The ratio of the voltage at the current sense pins to the sensed current.
LTC3880/LTC3880-1 PMBus Command Summary COMMAND NAME CMD CODE DESCRIPTION TYPE DATA PAGED FORMAT UNITS NVM DEFAULT VALUE PAGE POWER_GOOD_OFF 0x5F Output voltage at or below which a power good should be de-asserted. R/W Word Y L16 V Y 0.92 0x0EB8 73 TON_DELAY 0x60 Time from RUN and/or Operation on to output rail turn-on. R/W Word Y L11 ms Y 0.0 0x8000 78 TON_RISE 0x61 Time from when the output starts to rise until the R/W Word output voltage reaches the VOUT commanded value.
LTC3880/LTC3880-1 PMBus Command Summary COMMAND NAME CMD CODE DESCRIPTION USER_DATA_01 0xB1 Manufacturer reserved for LTpowerPlay. R/W Word Y Reg Y NA 89 USER_DATA_02 0xB2 OEM RESERVED. Typically used for part serialization R/W Word N Reg Y NA 89 USER_DATA_03 0xB3 A NVM word available for the user. R/W Word Y Reg Y 0x0000 89 USER_DATA_04 0xB4 A NVM word available for the user.
LTC3880/LTC3880-1 PMBus Command Summary COMMAND NAME CMD CODE DESCRIPTION TYPE DATA PAGED FORMAT UNITS NVM DEFAULT VALUE PAGE NA 107 NA 99 NA 102 NA 97 NA 101 NA 100 Y 0x10 68 CF Y 3900 0x0F3C 74 Y CF Y 1.0 0x4000 76 R/W Word Y L11 Y 0.0 0x8000 76 0xFA Common address for PolyPhase outputs to adjust common parameters. R/W Byte Y Reg Y 0x80 64 0xFD Commanded reset without requiring a power down.
LTC3880/LTC3880-1 PMBus Command Summary *Data Format L11 Linear_5s_11s PMBus data field b[15:0] Value = Y • 2N where N = b[15:11] is a 5-bit two’s complement integer and Y = b[10:0] is an 11-bit two’s complement integer Example: For b[15:0] = 0x9807 = ‘b10011_000_0000_0111 Value = 7 • 2–13 = 854 • 10–6 From “PMBus Spec Part II: Paragraph 7.
LTC3880/LTC3880-1 Applications Information The Typical Application on the back page is a basic LTC3880 application circuit. The LTC3880 can be configured to use either DCR (inductor resistance) sensing or low value resistor sensing. The choice between the two current sensing schemes is largely a design trade-off between cost, power consumption and accuracy.
LTC3880/LTC3880-1 Applications Information coupling into sensitive small-signal nodes. The capacitor C1 should be placed close to the IC pins. This impedance difference can result in loss of accuracy in the current reading of the ADC. The current reading accuracy can be improved by matching the impedance of the two pins. To accomplish this add a series resistor between VOUT and ISENSE– equal to R1. A capacitor of 1µF or greater should be placed in parallel with this resistor.
LTC3880/LTC3880-1 Applications Information purely inductive component. It was measured using two scope probes and waveform math to obtain a differential measurement. Based on additional measurements of the inductor ripple current and the on-time and off-time of the top switch, the value of the parasitic inductance was determined to be 0.
LTC3880/LTC3880-1 Applications Information Next, determine the DCR of the inductor. Where provided, use the manufacturer’s maximum value, usually given at 20°C. Increase this value to account for errors in the temperature sensing element of 3°C to 5°C and any additional errors associated with the proximity of the temperature sensor element to the inductor.
LTC3880/LTC3880-1 Applications Information Inductor Core Selection Once the inductor value is determined, the type of inductor must be selected. Core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance. As the inductance increases, core losses go down. Unfortunately, increased inductance requires more turns of wire and therefore copper losses increase.
LTC3880/LTC3880-1 Applications Information The optional Schottky diodes conduct during the dead time between the conduction of the two power MOSFETs. These prevent the body diodes of the bottom MOSFETs from turning on, storing charge during the dead time and requiring a reverse recovery period that could cost as much as 3% in efficiency at high VIN. A 1A to 3A Schottky is generally a good compromise for both regions of operation due to the relatively small average current.
LTC3880/LTC3880-1 Applications Information Digital Servo Mode For maximum accuracy in the regulated output voltage, enable the digital servo loop by asserting bit 6 of the MFR_PWM_MODE_LTC3880 command. In digital servo mode, the LTC3880 will adjust the regulated output voltage based on the ADC voltage reading. Every 100ms the digital servo loop will step the LSB of the DAC (nominally 1.375mV or 0.6875mV depending on the voltage range bit) until the output is at the correct ADC reading.
LTC3880/LTC3880-1 Applications Information the end of the fall time interval. If the TOFF_FALL time is set shorter than the time required to discharge the load capacitance, the output will not reach the desired zero volt state. At the end of TOFF_FALL, the controller will cease to sink current and VOUT will decay at the natural rate determined by the load impedance.
LTC3880/LTC3880-1 Applications Information typically 4.5V for logic level devices. The UVLO on INTVCC (EXTVCC) is set to approximately 4V. Both a LTC3880 and LTC3880-1 are valid for this configuration. Topside MOSFET Driver Supply (CB, DB) External bootstrap capacitors CB connected to the BOOST pins supply the gate drive voltages for the topside MOSFETs. Capacitor CB in the Block Diagram is charged though external diode DB from INTVCC when the SW pin is low.
LTC3880/LTC3880-1 Applications Information ripple current by a factor of 30% to 70% when compared to a single phase power supply solution. In continuous mode, the source current of the top MOSFET is a square wave of duty cycle (VOUT)/(VIN). To prevent large voltage transients, a low ESR capacitor sized for the maximum RMS current of one channel must be used.
LTC3880/LTC3880-1 Applications Information If the LTC3880 internal temperature is in excess of 85°C, the write into the NVM is not recommended. The data will still be held in RAM, unless the 3.3V supply UVLO threshold is reached. If the die temperature exceeds 130°C all NVM communication is disabled until the die temperature drops below 120°C. Open-Drain Pins long it takes for the desired signal to reach approximately 63% of the output value. This is one time constant.
LTC3880/LTC3880-1 Applications Information The PLL has a lock detection circuit. If the PLL should lose lock during operation, bit 4 of the STATUS_MFR_ SPECIFIC command is asserted and the ALERT pin is pulled low. The fault can be cleared by writing a 1 to the bit. If the user does not wish to see the PLL_FAULT, even if a synchronization clock is not available at power up, bit 3 of the MFR_CONFIG_ALL_LTC3880 command must be asserted.
LTC3880/LTC3880-1 Applications Information Refer to Tables 12 and 13 to set the output voltage using RCONFIG pins VOUTn_CFG and VTRIMn_CFG. RTOP is connected between VDD25 and the pin and RBOTTOM is connected between the pin and SGND. 1% resistors must be used to assure proper operation. The output voltage set point is equal to: VSETPOINT = VOUTn_CFG + VTRIMn_CFG For example, if the VOUTn_CFG pin has RTOP equal to 24.9k and RBOTTOM equal to 4.
LTC3880/LTC3880-1 Applications Information Table 14. FREQ_CFG (Phase Based on Falling Edge of SYNC) RTOP (kΩ) RBOTTOM (kΩ) FREQUENCY (kHz) 0 or Open 10 10 16.2 16.2 20 20 20 20 24.9 24.9 24.9 24.9 24.9 30.1 30.1 Open Open 23.2 15.8 20.5 17.4 17.8 15 12.7 11 11.3 9.09 7.32 5.76 4.32 3.57 1.96 0 NVM 250 250 250 425 425 425 500 500 500 575 575 575 650 650 650 External Clock Clock. All phasing is with respect to the falling edge of SYNC.
LTC3880/LTC3880-1 Applications Information To choose address 0x4E RTOP = 10.0k and RBOTTOM = 15.8k 1.96 xyz_0001 1 Open 0 xyz_0000 0 Efficiency Considerations Table 15. ASEL RTOP (kΩ) RBOTTOM (kΩ) SLAVE ADDRESS 0 or Open Open NVM 10 23.2 xyz_1111 F 10 15.8 xyz_1110 E 16.2 20.5 xyz_1101 D 16.2 17.4 xyz_1100 C 20 17.8 xyz_1011 B 20 15 xyz_1010 A 20 12.7 xyz_1001 9 20 11 xyz_1000 8 LSB HEX 24.9 11.3 xyz_0111 7 24.9 9.09 xyz_0110 6 24.9 7.
LTC3880/LTC3880-1 Applications Information This reduces the mid-current loss from 10% or more (if the driver was powered directly from VIN) to only a few percent. 3. I2R losses are predicted from the DC resistances of the fuse (if used), MOSFET, inductor, current sense resistor. In continuous mode, the average output current flows through L and RSENSE, but is “chopped” between the topside MOSFET and the synchronous MOSFET.
LTC3880/LTC3880-1 Applications Information to 80% of full-load current having a rise time of 1µs to 10µs will produce output voltage and ITH pin waveforms that will give a sense of the overall loop stability without breaking the feedback loop. Placing a power MOSFET with a resistor to ground directly across the output capacitor and driving the gate with an appropriate signal generator is a practical way to produce to a load step.
LTC3880/LTC3880-1 Applications Information ITH1 VSENSE1 L1 ISENSE1+ TG1 ISENSE1– SW1 CB1 M1 BOOST1 LTC3880 SYNC BG1 1µF CERAMIC RUN1 RIN CVIN D1 COUT1 + VIN RUN0 VOUT1 PGND VIN CIN INTVCC ISENSE0+ BG0 VSENSE0+ BOOST0 ITH0 SW0 VSENSE0– TG0 + CINTVCC ISENSE0– COUT2 1µF CERAMIC M3 GND + SGND + fIN M2 RSENSE1 M4 D2 CB0 RSENSE0 VOUT0 L0 3880 F25 Figure 25.
LTC3880/LTC3880-1 Applications Information the IC. Ensure accurate current sensing with Kelvin connections at the sense resistor or inductor, whichever is used for current sensing. output load drops below the low current operation threshold—typically 10% of the maximum designed current level in Burst Mode operation. 5. Is the INTVCC decoupling capacitor connected close to the IC, between the INTVCC and the power ground pins? This capacitor carries the MOSFET drivers current peaks.
LTC3880/LTC3880-1 Applications Information 10µF M1 D1 0.1µF L0 1.0µH INTVCC VIN TG1 TG0 BOOST0 4.99k 2.0k 10k 1µF 10k 10k VDD33 10k 10k 10k 10k 10k L1 0.56µH SW1 BG0 M4 BG1 PGND SYNC SDA M2 0.1µF BOOST1 SW0 M3 22µF 1µF D2 VIN 6V TO 24V 1.58k VDD25 1µF LTC3880 SCL ALERT VOUT0_CFG GPIO0 VTRIM0_CFG GPIO1 VOUT1_CFG 10k 24.9k 10k 20k 15.8k 11.3k 23.2k 12.7k SHARE_CLK VTRIM1_CFG RUN0 ASEL RUN1 FREQ_CFG WP 2.
LTC3880/LTC3880-1 Applications Information the resistor divider between VDD25 FREQ_CFG and SGND with RTOP = 20k and RBOTTOM = 12.7k. The address is set to XF where X is the MSB stored in NVM. tON(MIN) = VOUT VIN(MAX) • f = 1.8V = 180ns 20V ( 500kHz ) The following parameters are set as a percentage of the output voltage if the resistor configuration pins are used to determined output voltage: The Vishay IHLP4040DZ-11 1µH (2.3mΩ DCRTYP at 25°C) channel 0 and the VishayIHLP4040DZ-11 0.56µH (1.
LTC3880/LTC3880-1 Applications Information 3.3V 2 • (17.39 ) • 1+ ( 0.005) ( 50°C – 25°C) 20V 1 1 2 • 0.006Ω + ( 20V ) ( 8.695A ) • + 5 – 2.3 2.3 PMAIN = (75pF )(500kHz ) = 0.386W VORIPPLE = R(∆IL) = 0.006Ω • 5.5A = 33mV. The loss in the bottom side MOSFET is: PSYNC = (20V – 3.3V ) • 20V Connecting the USB to the I2C/SMBus/PMBus Controller to the LTC3880 In System (17.39A )2 • 1+ ( 0.005) ( 50°C – 25°C) • 0.001Ω = 0.
LTC3880/LTC3880-1 Applications Information system power is not present the dongle will power the LTC3880 through the VDD33 supply pin. To initialize the part when VIN is not applied and the VDD33 pin is powered use global address 5B command 0xBD data 0x2B followed by address 5B command 0xBD data 0xC4. The part can now be communicated with, and the project file updated. To write the updated project file to the NVM issue a STORE_USER_ALL command.
LTC3880/LTC3880-1 Applications Information environment that supports Linear Technology digital power ICs including the LTC3880. The software supports a variety of different tasks. LTpowerPlay can be used to evaluate Linear Technology ICs by connecting to a demo board or the user application. LTpowerPlay can also be used in an offline mode (with no hardware present) in order to build multiple IC configuration files that can be saved and re-loaded at a later time.
LTC3880/LTC3880-1 Applications Information power off/on, moving to a new output voltage set point, etc.) it will clear bit 4 of MFR_COMMON (‘output not in transition’). When internal calculations are in process, the part will clear bit 5 of MFR_COMMON (‘calculations not pending’). These three status bits can be polled with a PMBus read byte of the MFR_COMMON register until all three bits are set.
LTC3880/LTC3880-1 PMBus Command Details Addressing and Write Protect COMMAND NAME PAGE WRITE_PROTECT MFR_ADDRESS MFR_CHANNEL_ADDRESS MFR_RAIL_ADDRESS CMD CODE DESCRIPTION 0x00 Channel or page currently selected for any command that supports paging. 0x10 Level of protection provided by the device against accidental changes. 0xE6 Sets the 7-bit I2C address byte. 0xD8 Address to the PAGE activated channel 0xFA Common address for PolyPhase outputs to adjust common parameters.
LTC3880/LTC3880-1 PMBus Command Details If WP pin is high, PAGE, OPERATION, MFR_CLEAR_PEAKS, MFR_EE_UNLOCK and CLEAR_FAULTS commands are supported. Individual fault bits can be cleared by writing a 1 to the respective bits in the STATUS registers. MFR_ADDRESS The MFR_ADDRESS command byte sets the 7 bits of the PMBus slave address for this device. Setting this command to a value of 0x80 disables device addressing. The GLOBAL device address, 0x5A and 0x5B, cannot be deactivated.
LTC3880/LTC3880-1 PMBus Command Details General Configuration Registers COMMAND NAME CMD CODE DESCRIPTION TYPE DATA PAGED FORMAT UNITS NVM DEFAULT VALUE MFR_CHAN_CONFIG_LTC3880 0xD0 Configuration bits that are channel specific. R/W Byte Y Reg Y 0x1F MFR_CONFIG_ALL_LTC3880 0xD1 Configuration bits that are common to all pages. R/W Byte N Reg Y 0x09 MFR_CHAN_CONFIG_LTC3880 General purpose configuration command common to multiple LTC products.
LTC3880/LTC3880-1 PMBus Command Details On/Off/Margin COMMAND NAME CMD CODE DESCRIPTION TYPE DATA PAGED FORMAT UNITS NVM DEFAULT VALUE ON_OFF_CONFIG 0x02 RUN pin and PMBus bus on/off command configuration. R/W Byte Y Reg Y 0x1E OPERATION 0x01 Operating mode control. On/off, margin high and margin low. R/W Byte Y Reg Y 0x80 MFR_RESET 0xFD Commanded reset without requiring a power-down.
LTC3880/LTC3880-1 PMBus Command Details OPERATION The OPERATION command is used to turn the unit on and off in conjunction with the input from the RUNn pins. It is also used to cause the unit to set the output voltage to the upper or lower MARGIN VOLTAGEs. The unit stays in the commanded operating mode until a subsequent OPERATION command or change in the state of the RUNn pin instructs the device to change to another mode.
LTC3880/LTC3880-1 PMBus Command Details PWM Config COMMAND NAME CMD CODE DESCRIPTION TYPE DATA DEFAULT PAGED FORMAT UNITS NVM VALUE MFR_PWM_MODE_ LTC3880 0xD4 Configuration for the PWM engine of each channel R/W Byte Y Reg Y 0xC2 MFR_PWM_CONFIG_ LTC3880 0xF5 Set numerous parameters for the DC/DC controller including phasing.
LTC3880/LTC3880-1 PMBus Command Details BIT MEANING 7 Reserved, set to 0. 6 If VOUT0 RANGE = 1, the maximum output voltage for V0 is 2.75V. If RANGE = 0, the maximum output voltage for V0 is 4.096V. 5 If VOUT1 RANGE = 1, the maximum output voltage for V1 is 2.75V. If RANGE = 0, the maximum output voltage for V1 is 5.5V. 4 Share Clock Enable : If this bit is 1, the SHARE_CLK pin will not be released until VIN > VIN_ON. The SHARE_CLK pin will be pulled low when VIN < VIN_OFF.
LTC3880/LTC3880-1 PMBus Command Details Voltage Input Voltage and Limits COMMAND NAME CMD CODE DESCRIPTION TYPE DATA DEFAULT PAGED FORMAT UNITS NVM VALUE VIN_OV_FAULT_ LIMIT 0x55 Input supply overvoltage fault limit. R/W Word N L11 V Y 15.5 0xD3E0 VIN_UV_WARN_LIMIT 0x58 Input supply undervoltage warning limit. R/W Word N L11 V Y 6.3 0xCB26 VIN_ON 0x35 Input voltage at which the unit should start power conversion. R/W Word N L11 V Y 6.
LTC3880/LTC3880-1 PMBus Command Details Output Voltage and Limits COMMAND NAME VOUT_MODE CMD CODE DESCRIPTION 0x20 Output voltage format and exponent (2–12). TYPE R Byte PAGED Y DATA FORMAT UNITS Reg NVM VOUT_MAX 0x24 Upper limit on the commanded output voltage including VOUT_MARGIN_HIGH. R/W Word Y L16 V Y VOUT_OV_FAULT_ LIMIT 0x40 Output overvoltage fault limit. R/W Word Y L16 V Y VOUT_OV_WARN_ LIMIT 0x42 Output overvoltage warning limit.
LTC3880/LTC3880-1 PMBus Command Details MFR_COMMON. Either bit is low if the part is busy. If this wait time is not met, and the VOUT_COMMAND is modified above the old overvoltage limit, an OV condition might temporarily be detected resulting in undesirable behavior and possible damage to the switcher. If VOUT_OV_FAULT_RESPONSE is set to OV_PULLDOWN, the GPIO pin will not assert if VOUT_OV_FAULT is propagated.
LTC3880/LTC3880-1 PMBus Command Details VOUT_UV_WARN_LIMIT The VOUT_UV_ WARN_LIMIT command reads the value of the output voltage measured at the sense pins, in volts, which causes an output voltage low warning.
LTC3880/LTC3880-1 PMBus Command Details Current Input Current Calibration COMMAND NAME MFR_IIN_OFFSET CMD CODE DESCRIPTION 0xE9 Coefficient used to add to the input current to account for the IQ of the part. TYPE R/W Word DATA FORMAT L11 PAGED Y UNITS A NVM Y DEFAULT VALUE 0.050 0x9333 MFR_IIN_OFFSET The MFR_IIN_OFFSET command allows the user to set an input current representing the quiescent current of each channel.
LTC3880/LTC3880-1 PMBus Command Details IIN_OC_WARN_LIMIT The IIN_OC_WARN_LIMIT command sets the value of the input current, in amperes, that causes a warning indicating the input current is high. The READ_IIN value will be used to determine if this limit has been exceeded.
LTC3880/LTC3880-1 PMBus Command Details current limits are adjusted with temperature based on the MFR_IOUT_CAL_GAIN_TC using the equation: IOUT_OC_FAULT_LIMIT = IOUT_CAL_GAIN • (1 + MFR_IOUT_CAL_GAIN_TC • (READ_TEMPERTURE_1-27.0)). The LTpowerPlay GUI automatically convert the voltages to currents. The IOUT range is set with bit 7 of the MFR_PWM_MODE_LTC3880 command. The IOUT_OC_FAULT_LIMIT is ignored during TON_RISE and TOFF_FALL. This command has two data bytes and is formatted in Linear_5s_11s format.
LTC3880/LTC3880-1 PMBus Command Details This command has two data bytes and is formatted in Linear_5s_11s format. The part starts the calculation with a value of –273.15 so the default adjustment value is zero. External Temperature Limits COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED DATA FORMAT UNITS NVM DEFAULT VALUE OT_FAULT_LIMIT 0x4F External overtemperature fault limit. R/W Word Y L11 C Y 100.0 0xEB20 OT_WARN_LIMIT 0x51 External overtemperature warning limit.
LTC3880/LTC3880-1 PMBus Command Details Timing Timing—On Sequence/Ramp COMMAND NAME TON_DELAY CMD CODE DESCRIPTION 0x60 Time from RUN and/or Operation on to output rail turn-on. TON_RISE 0x61 Time from when the output starts to rise until the output voltage reaches the VOUT commanded value. TON_MAX_FAULT_LIMIT 0x62 Maximum time from VOUT_EN on for VOUT to cross the VOUT_UV_FAULT_LIMIT. VOUT_TRANSITION_RATE 0x27 Rate the output changes when VOUT commanded to a new value.
LTC3880/LTC3880-1 PMBus Command Details Timing—Off Sequence/Ramp COMMAND NAME TOFF_DELAY TOFF_FALL TOFF_MAX_WARN_LIMIT DATA CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS 0x64 Time from RUN and/or Operation off to the start R/W Word Y L11 ms of TOFF_FALL ramp. Time from when the output starts to fall until the R/W Word Y L11 ms 0x65 output reaches zero volts. 0x66 Maximum allowed time, after TOFF_FALL R/W Word Y L11 ms completed, for the unit to decay below 12.5%. NVM Y Y Y DEFAULT VALUE 0.0 0x8000 8.
LTC3880/LTC3880-1 PMBus Command Details MFR_RESTART_DELAY This command specifies the minimum RUN off time in milliseconds. This device will pull the RUN pin low for this length of time once a falling edge of RUN has been detected. The minimum recommended value is 136ms. Note: The restart delay is different than the retry delay. The restart delay pulls run low for the specified time, after which a standard start-up sequence is initiated.
LTC3880/LTC3880-1 PMBus Command Details • Sets the VIN Overvoltage Fault bit in the STATUS_INPUT command, and • Notifies the host by asserting ALERT pin This command has one data byte. Fault Responses Output Voltage COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED DATA FORMAT UNITS NVM DEFAULT VALUE VOUT_OV_FAULT_RESPONSE 0x41 Action to be taken by the device when an output overvoltage fault is detected.
LTC3880/LTC3880-1 PMBus Command Details Table 5. VOUT_OV_FAULT_RESPONSE Data Byte Contents BITS 7:6 DESCRIPTION Response VALUE 00 For all values of bits [7:6], the LTC3880: • Sets the corresponding fault bit in the status commands and • Notifies the host by asserting ALERT pin 01 The fault bit, once set, is cleared only when one or more of the following events occurs: • The device receives a CLEAR_FAULTS command.
LTC3880/LTC3880-1 PMBus Command Details Table 6. VOUT_UV_FAULT_RESPONSE Data Byte Contents BITS 7:6 DESCRIPTION VALUE Response MEANING 00 The PMBus device continues operation without interruption. (Ignores the fault functionally) 01 The PMBus device continues operation for the delay time specified by bits [2:0] and the delay time unit specified for that particular fault.
LTC3880/LTC3880-1 PMBus Command Details Fault Responses Output Current COMMAND NAME IOUT_OC_FAULT_RESPONSE CMD CODE DESCRIPTION 0x47 Action to be taken by the device when an output overcurrent fault is detected. TYPE PAGED DATA FORMAT R/W Byte Y Reg UNITS NVM DEFAULT VALUE Y 0x00 IOUT_OC_FAULT_RESPONSE The IOUT_OC_FAULT_RESPONSE command instructs the device on what action to take in response to an output overcurrent fault. The data byte is in the format given in Table 7.
LTC3880/LTC3880-1 PMBus Command Details Fault Responses IC Temperature COMMAND NAME MFR_OT_FAULT_RESPONSE CMD CODE DESCRIPTION 0xD6 Action to be taken by the device when an internal overtemperature fault is detected TYPE PAGED R Byte N DATA FORMAT UNITS NVM DEFAULT VALUE Reg 0xC0 MFR_OT_FAULT_RESPONSE The MFR_OT_FAULT_RESPONSE command byte instructs the device on what action to take in response to an internal overtemperature fault. The data byte is in the format given in Table 8.
LTC3880/LTC3880-1 PMBus Command Details Fault Responses External Temperature COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED DATA FORMAT UNITS NVM DEFAULT VALUE OT_FAULT_ RESPONSE 0x50 Action to be taken by the device when an external overtemperature fault is detected, R/W Byte Y Reg Y 0xB8 UT_FAULT_ RESPONSE 0x54 Action to be taken by the device when an external undertemperature fault is detected.
LTC3880/LTC3880-1 PMBus Command Details Table 9. Data Byte Contents: TON_MAX_FAULT_RESPONSE, VIN_OV_FAULT_RESPONSE, OT_FAULT_RESPONSE, UT_FAULT_RESPONSE BITS 7:6 DESCRIPTION VALUE MEANING Response 00 The PMBus device continues operation without interruption. For all values of bits [7:6], the LTC3880: 01 Not supported. Writing this value will generate a CML fault.
LTC3880/LTC3880-1 PMBus Command Details BIT(S) B[14] b[13] SYMBOL Mfr_gpio_propagate_short_CMD_cycle OPERATION 0: No action Mfr_gpio_propagate_ton_max_fault 1: Asserts low if commanded off then on before the output has sequenced off. Re-asserts high 120ms after sequence off.
LTC3880/LTC3880-1 PMBus Command Details Fault Sharing Response COMMAND NAME MFR_GPIO_RESPONSE CMD CODE DESCRIPTION TYPE 0xD5 Action to be taken by the device when the GPIO pin R/W Byte is asserted low. PAGED Y DATA FORMAT Reg UNITS NVM Y DEFAULT VALUE 0xC0 MFR_GPIO_RESPONSE This command determines the controller’s response to the GPIOn pin being pulled low by an external source. VALUE 0xC0 0x00 MEANING GPIO_INHIBIT The LTC3880 will three-state the output in response to the GPIO pin pulled low.
LTC3880/LTC3880-1 PMBus Command Details Identification COMMAND NAME PMBUS_REVISION CAPABILITY MFR_ID MFR_MODEL MFR_SERIAL MFR_SPECIAL_ID CMD CODE DESCRIPTION 0x98 PMBus revision supported by this device. Current revision is 1.1. 0x19 Summary of PMBus optional communication protocols supported by this device. 0x99 The manufacturer ID of the LTC3880 in ASCII. 0x9A Manufacturer part number in ASCII. 0x9E Serial number of this specific unit in ASCII. 0xE7 Manufacturer code representing the LTC3880.
LTC3880/LTC3880-1 PMBus Command Details Fault Warning and Status COMMAND NAME CLEAR_FAULTS CMD CODE DESCRIPTION 0x03 TYPE PAGED Clear any fault bits that have been set. Send Byte N FORMAT UNITS NVM DEFAULT VALUE NA MFR_CLEAR_PEAKS 0xE3 Clears all peaks values. Send Byte N STATUS_BYTE 0x78 One byte summary of the unit’s fault condition. R/W Byte Y Reg NA NA STATUS_WORD 0x79 Two byte summary of the unit’s fault condition.
LTC3880/LTC3880-1 PMBus Command Details STATUS_BYTE The STATUS_BYTE command returns a one-byte summary of the most critical faults. STATUS_BYTE Message Contents: BIT STATUS BIT NAME MEANING 7* BUSY 6 OFF 5 VOUT_OV An output overvoltage fault has occurred. 4 IOUT_OC An output overcurrent fault has occurred. 3 VIN_UV Not supported (LTC3880 returns 0). 2 TEMPERATURE 1 CML 0* NONE OF THE ABOVE A fault was declared because the LTC3880 was unable to respond.
LTC3880/LTC3880-1 PMBus Command Details STATUS_VOUT The STATUS_VOUT commands returns one byte of VOUT status information . STATUS_VOUT Message Contents: BIT MEANING 7 VOUT overvoltage fault. 6 VOUT overvoltage warning. 5 VOUT undervoltage warning. 4 VOUT undervoltage fault. 3 VOUT_MAX warning. 2 TON_MAX fault. 1 TOFF_MAX warning. 0 Not supported by the LTC3880 (returns 0). ALERT can be asserted if any of bits[7:1] are set.
LTC3880/LTC3880-1 PMBus Command Details STATUS_INPUT The STATUS_INPUT commands returns one byte of VIN (VINSNS) status information. STATUS_INPUT Message Contents: BIT MEANING 7 VIN overvoltage fault. 6 Not supported (LTC3880 returns 0). 5 VIN undervoltage warning. 4 Not supported (LTC3880 returns 0). 3 Unit off for insufficient VIN. 2 Not supported (LTC3880 returns 0). 1 Input over current warning. 0 Not supported (LTC3880 returns 0) ALERT can be asserted if bit 7 is set.
LTC3880/LTC3880-1 PMBus Command Details STATUS_CML The STATUS_CML commands returns one byte of status information on received commands, internal memory and logic. STATUS_CML Message Contents: BIT MEANING 7 Invalid or unsupported command received. 6 Invalid or unsupported data received. 5 Packet error check failed. 4 Memory fault detected. 3 Processor fault detected. 2 Reserved (LTC3880 returns 0). 1 Other communication fault. 0 Other memory or logic fault.
LTC3880/LTC3880-1 PMBus Command Details Summary of the Status Registers STATUS_VOUT 7 6 5 4 3 2 1 0 VOUT_OV Fault VOUT_OV Warning VOUT_UV Warning VOUT_UV Fault VOUT_MAX Warning TON_MAX_FAULT TOFF_MAX Warning Reserved 7 6 5 4 3 2 1 0 IOUT_OC Fault IOUT_OC Fault with LV Shutdown IOUT_OC Warning Reserved Reserved Reserved Reserved Reserved STATUS_WORD (Upper Byte) 7 6 5 4 3 2 1 0 VOUT IOUT/POUT INPUT MFR POWER_GOOD# Reserved Reserved Unknown STATUS_INPUT 7 6 5 4 3 2 1 0 VIN_OV Fault Reserved VIN_UV Warn
LTC3880/LTC3880-1 PMBus Command Details MFR_PADS This command provides the user a means of directly reading the digital status of the I/O pins of the device.
LTC3880/LTC3880-1 PMBus Command Details Telemetry COMMAND NAME CMD CODE DESCRIPTION READ_VIN 0x88 Measured input supply voltage. R Word READ_VOUT 0x8B Measured output voltage. READ_IIN 0x89 Calculated input supply current. MFR_READ_IIN 0xED READ_IOUT READ_TEMPERATURE_1 READ_TEMPERATURE_2 READ_DUTY_CYCLE TYPE PAGED FORMAT UNITS NVM DEFAULT VALUE N L11 V NA R Word Y L16 V NA R Word N L11 A NA Calculated input current per channel.
LTC3880/LTC3880-1 PMBus Command Details MFR_READ_IIN The MFR_READ_IIN command is a paged reading of the input current that applies the paged MFR_IIN_OFFSET parameter. This calculation is similar to READ_IIN except the paged values are used. MFR_READ_IIN = MFR_IIN_OFFSET + (IOUT • DUTYCYCLE) This command has 2 data bytes and is formatted in Linear_5s_11s format. READ_IOUT The READ_IOUT command returns the average output current in amperes.
LTC3880/LTC3880-1 PMBus Command Details MFR_VOUT_PEAK The MFR_VOUT_PEAK command reports the highest voltage, in volts, reported by the READ_VOUT measurement. This command is cleared using the MFR_CLEAR_PEAKS command. This read-only command has two data bytes and is formatted in Linear_16u format. MFR_VIN_PEAK The MFR_VIN_PEAK command reports the highest voltage, in volts, reported by the READ_VIN measurement. This command is cleared using the MFR_CLEAR_PEAKS command.
LTC3880/LTC3880-1 PMBus Command Details NVM Memory Commands Store/Restore COMMAND NAME CMD CODE DESCRIPTION STORE_USER_ALL 0x15 Store user operating memory to EEPROM. Send Byte N NA RESTORE_USER_ALL 0x16 Restore user operating memory from EEPROM. Send Byte N NA MFR_COMPARE_USER_ALL 0xF0 Compares current command contents with NVM.
LTC3880/LTC3880-1 PMBus Command Details Fault Logging COMMAND NAME CMD CODE DESCRIPTION TYPE R Block DATA PAGED FORMAT UNITS CF DEFAULT VALUE Y NA MFR_FAULT_LOG 0xEE Fault log data bytes. This sequentially retrieved data is used to assemble a complete fault log. MFR_FAULT_LOG_ STORE 0xEA Command a transfer of the fault log from RAM to Send Byte EEPROM. This causes the part to behave as if a channel has faulted off.
LTC3880/LTC3880-1 PMBus Command Details Table 11. Fault Logging This table outlines the format of the block data from a read block data of the MFR_FAULT_LOG command. Data Format Definitions DATA Block Length LIN 11 = PMBus = Rev 1.1, Part 2, section 7.1 LIN 16 = PMBus Rev 1.1, Part 2, section 8.
LTC3880/LTC3880-1 PMBus Command Details CYCLICAL DATA EVENT n Event “n” represents one complete cycle of ADC reads through the MUX at time of fault.
LTC3880/LTC3880-1 PMBus Command Details EVENT n-1 (data measured before fault was detected) READ_VOUT (PAGE 0) [15:8] LIN 16 47 [7:0] LIN 16 48 [15:8] LIN 16 49 [7:0] LIN 16 50 READ_IOUT (PAGE 0) [15:8] LIN 11 51 [7:0] LIN 11 52 READ_IOUT (PAGE 1) [15:8] LIN 11 53 [7:0] LIN 11 54 READ_VIN [15:8] LIN 11 55 [7:0] LIN 11 56 [15:8] LIN 11 57 [7:0] LIN 11 58 STATUS_VOUT (PAGE 0) BYTE 59 STATUS_VOUT (PAGE 1) BYTE 60 WORD 61 READ_VOUT (PAGE 1) READ_IIN STATUS_WORD
LTC3880/LTC3880-1 PMBus Command Details EVENT n-5 (Oldest Recorded Data) READ_VOUT (PAGE 0) [15:8] LIN 16 127 [7:0] LIN 16 128 READ_VOUT (PAGE 1) [15:8] LIN 16 129 [7:0] LIN 16 130 READ_IOUT (PAGE 0) [15:8] LIN 11 131 [7:0] LIN 11 132 [15:8] LIN 11 133 [7:0] LIN 11 134 [15:8] LIN 11 135 [7:0] LIN 11 136 [15:8] LIN 11 137 [7:0] LIN 11 138 BYTE 139 READ_IOUT (PAGE 1) READ_VIN READ_IIN STATUS_VOUT (PAGE 0) STATUS_VOUT (PAGE 1) BYTE 140 [15:8] WORD 141 [7:0] WORD
LTC3880/LTC3880-1 PMBus Command Details Table 11a: Explanation of Position_Fault Values POSITION_FAULT VALUE SOURCE OF FAULT LOG 0xFF MFR_FAULT_LOG_STORE 0x00 TON_MAX_FAULT Channel 0 0x01 VOUT_OV_FAULT Channel 0 0x02 VOUT_UV_FAULT Channel 0 0x03 IOUT_OC_FAULT Channel 0 0x05 OT_FAULT Channel 0 0x06 UT_FAULT Channel 0 0x07 VIN_OV_FAULT Channel 0 0x0A MFR_OT_FAULT Channel 0 0x10 TON_MAX_FAULT Channel 1 0x11 VOUT_OV_FAULT Channel 1 0x12 VOUT_UV_FAULT Channel 1 0x13 IOUT_OC_FAULT Chann
LTC3880/LTC3880-1 PMBus Command Details Block Memory Write/Read COMMAND NAME CMD CODE DESCRIPTION TYPE DATA DEFAULT PAGED FORMAT UNITS NVM VALUE MFR_EE_UNLOCK 0xBD Unlock user EEPROM for access by MFR_EE_ERASE and MFR_EE_DATA commands. R/W Byte N Reg NA MFR_EE_ERASE 0xBE Initialize user EEPROM for bulk programming by MFR_EE_ R/W Byte DATA. N Reg NA MFR_EE_DATA 0xBF Data transferred to and from EEPROM using sequential PMBus word reads or writes. Supports bulk programming.
LTC3880/LTC3880-1 Typical Applications High Efficiency Dual 500kHz 5V/3.3V Step-Down Converter with Sense Resistors M1 0.005Ω 10µF D1 0.1µF L0 2.2µH INTVCC VIN TG0 TG1 BOOST0 1µF D2 M2 22µF 0.1µF L1 2.2µH BOOST1 SW0 SW1 BG0 BG1 VIN 6V TO 24V 0.005Ω LTC3880 4.99k 10k 10k 10k VDD33 10k 10k 10k 10k 10k PGND SYNC VDD25 SDA SCL ALERT VOUT0_CFG GPIO0 VTRIM0_CFG GPIO1 VOUT1_CFG 10k 10k 15.8k 23.2k 20k 11k 16.2k 20k 20.5k 12.
LTC3880/LTC3880-1 Typical ApplicationS High Efficiency 350kHz 2-Phase 1.5V Dual Step-Down Converter with External VCC and Sense Resistors 5VCC 10µF M1 D1 0.1µF L0 0.0015Ω 0.42µH VIN EXTVCC TG1 TG0 BOOST0 4.99k 10k 10k VDD33 10k 10k L1 0.42µH 0.0015Ω M4 BG1 PGND SYNC VDD25 LTC3880-1 SCL 10k M2 SW1 BG0 SDA 0.1µF BOOST1 SW0 M3 22µF 1µF D2 VIN 6V TO 24V ALERT VOUT0_CFG GPIO0 VTRIM0_CFG GPIO1 VOUT1_CFG 24.9k 20k 7.32k 17.
LTC3880/LTC3880-1 Typical ApplicationS High Efficiency 425kHz 1V Step-Down Dual Phase Converter with Power Blocks 10µF VIN VOUT PWMH P1 CS– VGATE + CS TEMP+ TEMP– PWML GND 1µF 1µF 4.99k 10k 10k 10k 10k 10k BOOST1 SW0 SW1 BG0 BG1 SYNC SDA PGND VDD25 SCL ALERT GPIO0 VOUT0_CFG GPIO1 VTRIM0_CFG + 16.2k 4.32k 17.8k 17.4k ASEL RUN1 FREQ_CFG TSNS1 ISENSE1+ 1µF 0.22µF ISENSEO– ISENSE1– VSENSEO+ VSENSE1 VSENSEO– ITHO ITH1 VDD33 SGND VDD25 4700pF 2.55k 20k VTRIM1_CFG RUN0 0.
For more information www.linear.com/LTC3880 530µF VOUT0 1.8V 75A M3 10nF 1.58k 0.1µF 0.22µF 1µF D1 L0 TO L3: VISHAY IHLP-4040DZ-11 0.56µH, 1µH M1, M2, M5, M6: INFINEON BSC050N03LS M3, M4, M7, M8: INFINEON BSC010NE2LSI + 1µF 1.58k L0 0.
530µF For more information www.linear.com/LTC3880 10nF M3 2.55k 4700pF 1.58k 1µF 0.1µF 10k 10k 10k 10k 5k 5k 4.99k D1 220pF 0.22µF L0 TO L3: VISHAY IHLP-4040DZ-11 0.36µH M1, M2, M5, M6: INFINEON BSC050N03LS M3, M4, M7, M8: INFINEON BSC010NE2LSI + 1µF 1.58k L0 0.
LTC3880/LTC3880-1 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UJ Package 40-Lead Plastic QFN (6mm × 6mm) (Reference LTC DWG # 05-08-1728 Rev Ø) 0.70 ±0.05 6.50 ±0.05 5.10 ±0.05 4.42 ±0.05 4.50 ±0.05 (4 SIDES) 4.42 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 6.00 ±0.10 (4 SIDES) 0.75 ±0.05 R = 0.10 TYP R = 0.115 TYP 39 40 0.40 ±0.
LTC3880/LTC3880-1 Revision History REV DATE DESCRIPTION A 10/11 Added I-grade, all sections updated B 11/13 C 05/14 PAGE NUMBER 1-112 Amended upper limit of ISENSE0/1 5 Amended parametric errors and typical values 6 Amended Pin Function errors 13 Amended 2nd left paragraph under Operation 17 Amended 3rd left paragraph under Operation 23 Amended commands on Table 2 31 Amended formula on Figure 18a 38 Amended component on Figure 27 56 Amended Scratchpad table 88 Amended Identifica
LTC3880/LTC3880-1 Typical Application High Efficiency Dual 425kHz 2.5V/1.8V Step-Down Converter 10µF M1 D1 BOOST0 M3 4.99k 10k 1µF 10k 10k 10k VDD33 10k 10k 10k 10k M2 0.1µF L1 0.56µH SW1 BG0 M4 BG1 PGND SYNC SDA VIN 6V TO 24V BOOST1 SW0 2.0k 1µF D2 TG1 TG0 0.1µF L0 1.0µH INTVCC VIN 22µF 1.58k VDD25 1µF LTC3880 SCL ALERT VOUT0_CFG GPIO0 VTRIM0_CFG GPIO1 VOUT1_CFG 20k 24.9k 10k 16.2k 15k 11.3k 15.8k 17.
