Datasheet

LTC3876
34
3876f
can be added to improve the high frequency response, as
shown in Figure 1. Capacitor C
FF
provides phase lead by
creating a high frequency zero with R
FB2
which improves
the phase margin.
A more severe transient can be caused by switching in
loads with large supply bypass capacitors. The discharged
bypass capacitors of the load are effectively put in parallel
with the converter’s C
OUT
, causing a rapid drop in V
OUT
.
No regulator can deliver current quick enough to prevent
this sudden step change in output voltage, if the switch
connecting the C
OUT
to the load has low resistance and is
driven quickly. The solution is to limit the turn-on speed of
the load switch driver. Hot Swap™ controllers are designed
specifically for this purpose and usually incorporate current
limiting, short-circuit protection and soft starting.
Load-Release Transient Detection
As the output voltage requirement of step-down switching
regulators becomes lower, V
IN
to V
OUT
step-down ratio
increases, and load transients become faster, a major
challenge is to limit the overshoot in V
OUT
during a fast
load current drop, or “load-release” transient.
Inductor current slew rate di
L
/dt = V
L
/L is proportional
to voltage across the inductor V
L
= V
SW
– V
OUT
. When
the top MOSFET is turned on, V
L
= V
IN
– V
OUT
, inductor
current ramps up. When bottom MOSFET turns on, V
L
=
V
SW
– V
OUT
= –V
OUT
, inductor current ramps down. At
very low V
OUT
, the low differential voltage, V
L
, across the
inductor during the ramp down makes the slew rate of the
inductor current much slower than needed to follow the
load current change. The excess inductor current charges
up the output capacitor, which causes overshoot at V
OUT
.
If the bottom MOSFET could be turned off during the load-
release transient, the inductor current would flow through
the body diode of the bottom MOSFET, and the equation
can be modified to include the bottom MOSFET body
diode drop to become V
L
= –(V
OUT
+ V
BD
). Obviously the
benefit increases as the output voltage gets lower, since
V
BD
would increase the sum significantly, compared to a
single V
OUT
only.
The load-release overshoot at V
OUT
causes the error ampli-
fier output, ITH, to drop quickly. ITH voltage is proportional
to the inductor current setpoint. A load transient will
result in a quick change of this load current setpoint, i.e.,
a negative spike of the first derivative of the ITH voltage.
The LTC3876 uses a detect transient (DTR) pin to monitor
the first derivative of the ITH voltage, and detect the load-
release transient. Referring to the Functional Diagram, the
DTR pin is the input of a DTR comparator, and the internal
reference voltage for the DTR comparator is half of INTV
CC
.
To use this pin for transient detection, ITH compensation
needs an additional R
ITH
resistor tied to INTV
CC
, and con-
nects the junction point of ITH compensation components
C
ITH1
, R
ITH1
and R
ITH2
to the DTR pin as shown in the
Functional Diagram. The DTR pin is now proportional to
the first derivative of the inductor current setpoint, through
the highpass filter of C
ITH1
and (R
ITH1
//R
ITH2
).
The two R
ITH
resistors establish a voltage divider from
INTV
CC
to SGND, and bias the DC voltage on DTR pin (at
steady-state load or ITH voltage) slightly above half of
INTV
CC
. Compensation performance will be identical by
using the same C
ITH1
and make R
ITH1
//R
ITH2
equal the
R
ITH
as used in conventional single resistor OPTI-LOOP
compensation. This will also provide the R-C time constant
needed for the DTR duration. The DTR sensitivity can be
adjusted by the DC bias voltage difference between DTR
and half INTV
CC
. This difference could be set as low as
100mV, as long as the ITH ripple voltage with DC load
current does not trigger the DTR.
When load current suddenly drops, V
OUT
overshoots, and
ITH drops quickly. The voltage on the DTR pin will also
drop quickly, since it is coupled to the ITH pin through a
capacitor. If the load transient is fast enough that the DTR
voltage drops below half of INTV
CC
, a load release event
is detected. The bottom gate (BG) will be turned off, so
that the inductor current flows through the body diode
in the bottom MOSFET. This allows the SW node to drop
below PGND by a voltage of a forward-conducted silicon
diode. This creates a more negative differential voltage
(V
SW
– V
OUT
) across the inductor, allowing the inductor
current to drop at a faster rate to zero, therefore creating
less overshoot on V
OUT
.
APPLICATIONS INFORMATION