LTC3876 Dual DC/DC Controller for DDR Power with Differential VDDQ Sensing and ±50mA VTT Reference DESCRIPTION FEATURES n n n n n n n n n n n n Complete DDR Power Solution with VTT Reference Wide VIN Range: 4.5V to 38V, VDDQ: 1V to 2.5V ±0.67% VDDQ Output Voltage Accuracy VDDQ and VTT Termination Controllers ±1.
LTC3876 ABSOLUTE MAXIMUM RATINGS (Note 1) Input Supply Voltage (VIN) ......................... –0.3V to 40V BOOST1, BOOST2 Voltages ....................... –0.3V to 46V SW1, SW2 Voltages ...................................... –5V to 40V INTVCC, DRVCC1, DRVCC2, EXTVCC, PGOOD, RUN, (BOOST1-SW1), (BOOST2-SW2), MODE/PLLIN Voltages ....................................................... –0.3V to 6V VOUTSENSE1+, VOUTSENSE1– , SENSE1+, SENSE1–, SENSE2+, SENSE2– Voltages ....................... –0.
LTC3876 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 4.5 38 V VDDQ Regulates Differentially with Respect to VOUTSENSE1–, VTTSNS and VTTR Regulate Differentially to One-Half VDDQ with Respect to VOUSTSENSE1– 1.0 0.5 0.5 2.5 1.25 1.
LTC3876 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 1.15 1.2 1.25 V Start-Up and Shutdown l VRUN(TH) RUN Pin On Threshold VRUN Rising VRUN(HYS) RUN Pin On Hysteresis VRUN Falling from VRUN(TH) 100 mV IRUN(OFF) RUN Pin Pull-Up Current When Off RUN = SGND 2.
LTC3876 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX PGDOV PGOOD Overvoltage Threshold PGDUV UNITS VOUTSENSE, VTTSNS Rising, with Respect to Reference Voltage 5 7.5 10 % PGOOD Undervoltage Threshold VOUTSENSE, VTTSNS Falling, with Respect to Reference Voltage –5 –7.
LTC3876 TYPICAL PERFORMANCE CHARACTERISTICS Transient Response VDDQ (Forced Continuous Mode) Load Step VDDQ (Forced Continuous Mode) ILOAD 20A/DIV VSW 20V/DIV Load Release VDDQ (Forced Continuous Mode) ILOAD 20A/DIV VSW 20V/DIV ILOAD 20A/DIV VSW 20V/DIV VOUT 50mV/DIV VOUT 50mV/DIV VOUT 50mV/DIV IL 20A/DIV IL 20A/DIV IL 20A/DIV 10μs/DIV LOAD TRANSIENT = 0A TO 15A VIN = 12V VOUT = 1.5V FIGURE 10 CIRCUIT, VDDQ CHANNEL 1 3876 G01 5μs/DIV LOAD STEP = 0A TO 15A VIN = 12V VOUT = 1.
LTC3876 TYPICAL PERFORMANCE CHARACTERISTICS Regular Soft Start-Up (Forced Continuous Mode) Output Tracking (Forced Continuous Mode) Soft Start-Up Into Prebiased Output RUN 5V/DIV VIN 5V/DIV VDDQ 500mV/DIV TRACK/SS 200mV/DIV VTT 500mV/DIV VDDQ 500mV/DIV VTT 500mV/DIV TRACK/SS 200mV/DIV Overcurrent Protection (Forced Continuous Mode) LOAD CURRENT 20A/DIV IL 10A/DIV VOUT 50mV/DIV SHORTCIRCUIT TRIGGER 1V/DIV VOUT 1V/DIV 24A IL 20A/DIV 0A COUT DISCHARGE COUT RECHARGE 3876 G13 500μs/DIV BG STAYS ON U
LTC3876 TYPICAL PERFORMANCE CHARACTERISTICS Output Regulation vs Input Voltage VDDQ Channel 1 Output Regulation vs Load Current VDDQ Channel 1 0.2 Output Regulation vs Temperature VDDQ Channel 1 0.6 0.2 0 –0.1 VOUT = 1.5V ILOAD = 5A VOUT NORMALIZED AT VIN = 15V –0.2 0 5 10 15 20 25 30 NORMALIZED ΔVOUT (%) NORMALIZED ΔVOUT (%) 0.1 0 –0.1 VIN = 15V VOUT = 1.5V VOUT NORMALIZED AT ILOAD = 4A –0.2 35 0 40 2 VIN (V) 4 6 ILOAD (A) –0.
LTC3876 TYPICAL PERFORMANCE CHARACTERISTICS Error Amplifier Transconductance vs Temperature 1.75 1.70 1.65 1.60 1.55 120 120 100 90 80 60 40 20 0 –20 VRNG = 2V VRNG = 1V VRNG = 0.6V –40 1.50 –50 –25 –60 0 25 50 75 100 125 150 TEMPERATURE (°C) 0 1.6 1.2 0.8 ITH VOLTAGE (V) 0.4 2 –30 –60 0 0.6 1.20 14 1.15 10 8 6 0.4 4 0.2 2 0 –50 –25 0 RUN PIN BELOW SWITCHING THRESHOLD 40 4.5 0 3.8 25 20 15 10 3.5 3.
LTC3876 PIN FUNCTIONS (QFN/TSSOP) ITH2 (Pin 1/Pin 5): Channel 2 VTT Current Control Threshold. This pin is the output of the error amplifier and the switching regulator’s compensation point. The current comparator threshold increases with this control voltage. This voltage ranges from 0V to 2.2V. ITH2 has been optimized to support a symmetric range of positive and negative current by moving the zero sense voltage to 1.2V. (zero inductor valley current). VDDQSNS (Pin 2/Pin 6): VDDQ Sense.
LTC3876 PIN FUNCTIONS (QFN/TSSOP) TRACK/SS1 (Pin 11/Pin 15): External Tracking and SoftStart Input for Channel 1 VDDQ . An internal 1μA temperature-independent pull-up current source is connected to the TRACK/SS1 pin. A capacitor to ground at this pin sets the ramp time to the final regulated output voltage. The LTC3876 regulates VDFB1, the differential feedback voltages (VOUTSENSE1+ – VOUTSENSE1–) to the smaller of 0.6V or the voltage on the TRACK/SS1 pin.
LTC3876 PIN FUNCTIONS (QFN/TSSOP) BG1, BG2 (Pin 22, Pin 29/Pin 26, Pin 33): Bottom Gate Driver Outputs. The BG pins drive the gates of the bottom N-channel power MOSFET between PGND and DRVCC. DRVCC1, DRVCC2 (Pin 23, Pin 28/Pin 27, Pin 32): Supplies of Bottom Gate Drivers. DRVCC1 is also the output of an internal 5.3V regulator, DRVCC2 is also the output of the EXTVCC switch. Normally the two DRVCC pins are shorted together on the PCB, and decoupled to PGND with a minimum of 4.
LTC3876 FUNCTIONAL DIAGRAM VIN VIN IN EN LDO OUT SD 2μA TO 5μA PTAT 10μA + UVLO 4.2V + 1.2V BOOST TG DRV – RUN TG VTT CHANNEL 2 MT L SW EN_DRV – CB DB RSENSE DRVCC + 0.7V – – LOGIC CONTROL SENSE– VIN 250k 4.
LTC3876 OPERATION (Refer to Functional Diagram) DDR Operation The LTC3876 is a dual channel, current mode step-down controller designed to provide high efficiency power conversion for high power DDR memory and bus termination supplies. Its unique controlled on-time architecture allows extremely low step-down ratio’s while maintaining a fast, constant switching frequency. The LTC3876 is a complete DDR power solution with one master RUN pin, TRACK/SS input and PGOOD output. The RUN pin enables all supplies.
LTC3876 OPERATION (Refer to Functional Diagram) ing frequency. As the top MOSFET is turned off, the bottom MOSFET is turned on after a small delay. The delay, or dead time, is to avoid both top and bottom MOSFETs being on at the same time, causing shoot-through current from VIN directly to power ground. The next switching cycle is initiated when the current comparator, ICMP, senses that inductor current falls below the trip level set by voltages at the ITH and VRNG pins.
LTC3876 OPERATION (Refer to Functional Diagram) and INTVCC with the external voltage source and helping to increase overall efficiency and decrease internal self heating from power dissipated in the LDO. This external power source could be the output of the step-down converter itself, given that the output is programmed to higher than 4.7V. The VIN pin still needs to be powered up but now draws minimum current.
LTC3876 OPERATION (Refer to Functional Diagram) Power Good and Fault Protection The PGOOD pin is connected to an internal open-drain N-channel MOSFET. An external resistor or current source can be used to pull this pin up to 6V (e.g., VDDQ/VTT or DRVCC). Overvoltage or undervoltage comparators (OV, UV) turn on the MOSFET and pull the PGOOD pin low when the feedback voltage is outside the ±7.5% window of the 0.6V reference voltage. The PGOOD pin is also pulled low when the channel’s RUN pin is below the 1.
LTC3876 APPLICATIONS INFORMATION Once the required output voltage and operating frequency have been determined, external component selection is driven by load requirement, and begins with the selection of inductors and current sense method (either sense resistors RSENSE or inductor DCR sensing). Next, power MOSFETs are selected. Finally, input and output capacitors are selected.
LTC3876 APPLICATIONS INFORMATION CIN MT + – VIN POWER TRACE PARASITICS L LTC3876 VOUTSENSE1+ VOUTSENSE1– RFB2 ±VDROP(PWR) MB RFB1 COUT1 ILOAD COUT2 I LOAD GROUND TRACE PARASITICS ±VDROP(GND) OTHER CURRENTS FLOWING IN SHARED GROUND PLANE 3876 F02 Figure 2.
LTC3876 APPLICATIONS INFORMATION Inductor Core Selection Current Limit Programming Once the value for L is known, the type of inductor must be selected. The two basic types are iron powder and ferrite. The iron powder types have a soft saturation curve which means they do not saturate hard like ferrites do. However, iron powder type inductors have higher core losses.
LTC3876 APPLICATIONS INFORMATION RSENSE RESISTOR AND PARASITIC INDUCTANCE R ESL VOUT LTC3876 SENSE+ CF SENSE– CF t 3F ≤ ESL/RS POLE-ZERO CANCELLATION RF RF 3876 F03a FILTER COMPONENTS PLACED NEAR SENSE PINS Figure 3a. RSENSE Current Sensing TO SENSE FILTER, NEXT TO THE CONTROLLER COUT RSENSE 3876 F03b Figure 3b. Sense Lines Placement with Sense Resistor RSENSE is chosen based on the required maximum output current.
LTC3876 APPLICATIONS INFORMATION VSENSE 20mV/DIV VESL(STEP) 500ns/DIV 3876 F04a Figure 4a. Voltage Waveform Measured Directly Across the Sense Resistor The previous discussion generally applies to high density/ high current applications where IOUT(MAX) > 10A and low inductor values are used. For applications where IOUT(MAX) < 10A, set RF to 10Ω and CF to 1000pF. This will provide a good starting point. The filter components need to be placed close to the IC.
LTC3876 APPLICATIONS INFORMATION the target sense resistance. With the ability to program current limit through the VRNG pin, R2 may be optional. C1 is usually selected in the range of 0.01μF to 0.47μF. This forces R1||R2 to around 2k to 4k, reducing error that might have been caused by the SENSE pins’ input bias currents. Resistor R1 should be placed close to the switching node, to prevent noise from coupling into sensitive small-signal nodes. Capacitor C1 should be placed close to the IC pins.
LTC3876 APPLICATIONS INFORMATION The MOSFET power dissipations at maximum output current are given by: a single-phase application. The maximum RMS capacitor current is given by: PTOP = DTOP •IOUT(MAX)2 •RDS(ON)(MAX) (1+ δ ) + VIN 2 IRMS ≅IOUT(MAX) • VOUT • VIN VIN –1 VOUT R TG(HI) R TG(LO) ⎤ ⎛ IOUT(MAX) ⎞ ⎡ • CMILLER ⎢ •⎜ + ⎥•f ⎟ 2 V – V V ⎝ ⎠ MILLER ⎦ ⎣ DRVCC MILLER This formula has a maximum at VIN = 2VOUT , where IRMS = IOUT(MAX)/2.
LTC3876 APPLICATIONS INFORMATION the capacitors. A lower input inductance will result in less ripple current through the input capacitors since more ripple current will now be flowing out of the input source. For simulating positive output current loading using this model, look at the ripple current during steady-state for the case where one phase is fully loaded and the other is not loaded.
LTC3876 APPLICATIONS INFORMATION Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types.
LTC3876 APPLICATIONS INFORMATION When the voltage applied to the EXTVCC pin rises above 4.7V, the VIN LDO is turned off and the EXTVCC is connected to DRVCC2 pin with an internal switch. This switch remains on as long as the voltage applied to EXTVCC remains above 4.5V. Using EXTVCC allows the MOSFET driver and control power to be derived from the LTC3876’s switching regulator output VOUT during normal operation and from the LDO when the output is out of regulation (e.g., startup, short-circuit).
LTC3876 APPLICATIONS INFORMATION can be used to set a VIN to turn on a channel’s switching. If resistor dividers are used on both RUN pins, when VIN is low enough and both RUN pins are pulled below the ~0.8V threshold, the part will shut down all bias of INTVCC and DRVCC and be put in micropower shutdown mode. The RUN pins’ bias currents depend on the RUN voltages. The bias current changes should be taken into account when designing the external voltage divider UVLO circuit.
LTC3876 APPLICATIONS INFORMATION So which mode should be programmed? While either mode satisfies most practical applications, some tradeoffs exist. The ratiometric mode saves a pair of resistors, but the coincident mode offers better output regulation. When the master channel’s output experiences dynamic excursion (under load transient, for example), the slave channel output will be affected as well. For better output regulation, use the coincident tracking mode instead of ratiometric.
LTC3876 APPLICATIONS INFORMATION As the on-time is a function of the switching regulator’s output voltage, this output is measured by the VOUT pin to set the required on-time. Simply connecting VOUT to the regulator’s local output point is preferable for most applications, as the remotely regulated output point could be significantly different from the local output point due to line losses, and local output versus local ground is typically the VOUT required for the calculation of tON.
LTC3876 APPLICATIONS INFORMATION If an application requires very low (approaching minimum) on-time, the system may not be able to maintain its full frequency synchronization range. Getting closer to minimum on-time, it may even lose phase/frequency lock at no load or light load conditions, under which the SW on-time is effectively longer than TG on-time due to TG/BG dead times. This is discussed further under Minimum On-Time, Minimum Off-Time and Dropout Operation.
LTC3876 APPLICATIONS INFORMATION to the minimum on-time of 30ns as shown in Figure 10. Each of the dead times are in the order of 35ns. Therefore, the VTT channel minimum on time should be no less than 100ns with 150ns preferred. In continuous mode operation, the minimum on-time limit imposes a minimum duty cycle of: DMIN = f • tON(MIN) where tON(MIN) is the effective minimum on-time for the switching regulator.
LTC3876 APPLICATIONS INFORMATION Worst-case efficiency typically occurs at the highest VIN and highest ambient temperature. It is important to check for consistency between the assumed MOSFET junction temperatures and the resulting value of ILIMIT which heats the MOSFET switches. To further limit current in the event of a short circuit to ground, the LTC3876 includes foldback current limiting.
LTC3876 APPLICATIONS INFORMATION can be added to improve the high frequency response, as shown in Figure 1. Capacitor CFF provides phase lead by creating a high frequency zero with RFB2 which improves the phase margin. A more severe transient can be caused by switching in loads with large supply bypass capacitors. The discharged bypass capacitors of the load are effectively put in parallel with the converter’s COUT , causing a rapid drop in VOUT .
LTC3876 APPLICATIONS INFORMATION The DTR comparator output is overridden by reverse inductor current detection (IREV) and overvoltage (OV) condition. This means BG will be turned off when SENSE+ is higher than SENSE– (i.e., inductor current is positive), as long as the OV condition is not present. When inductor current drops to zero and starts to reverse, BG will turn back on in forced continuous mode (e.g.
LTC3876 APPLICATIONS INFORMATION source will scale the VIN current required for the driver and controller circuits by a factor of (duty cycle)/(efficiency). For example, in a 20V to 5V application, 10mA of DRVCC current results in approximately 2.5mA of VIN current. This reduces the mid-current loss from 10% or more (if the driver was powered directly from VIN) to only a few percent. 4. CIN loss.
LTC3876 APPLICATIONS INFORMATION The minimum on-time for channel 1 VDDQ is: tON(MIN) = VOUT VIN(MAX) • f = 1.5V = 268ns 14V • 400kHz The minimum on-time for channel 2 VTT is: tON(MIN) = VOUT VIN(MAX) • f = 0.75V = 134ns 14V • 400kHz Set the channel 1 VDDQ inductor value L1 to give 35% ripple current at the maximum load to 20A for the maximum VIN of 14V using the adjusted operating frequency. ⎛ VOUT ⎞ ⎟ L1= ⎜1− ( f ) (IRIPPLE ) ⎝ VIN(MAX)⎠ VOUT ⎛ 1.5 ⎞ ⎟ = 0.
LTC3876 APPLICATIONS INFORMATION The DCR sense filter is designed using a simple RC filter across the inductor. If the inductor value and DCR is known, choose a sense filter C and calculate filter resistance. These numbers show that careful attention should be paid to proper heat sinking when operating at higher ambient temperatures. Channel 1 DCR filter resistor RDCR1: Select CIN capacitors to give ample capacitance and RMS ripple current rating. Consider worst-case duty cycles per Figure 6.
LTC3876 APPLICATIONS INFORMATION PCB Layout Checklist The printed circuit board layout is illustrated graphically in Figure 12. Use the following checklist to ensure proper operation of the LTC3876: • A multilayer printed circuit board with dedicated ground planes is generally preferred to reduce noise coupling and improve heat sinking. The ground plane layer should be immediately next to the routing layer for the power components, e.g., MOSFETs, inductors, sense resistors, input and output capacitors etc.
LTC3876 APPLICATIONS INFORMATION VIN 4.5V TO 14V CIN1 180μF w2 CIN2 10μF w3 2.2Ω LTC3876 1μF VIN SENSE1– SENSE2– SENSE1+ SENSE2+ BOOST1 BOOST2 0.1μF 0.1μF 0.1μF 0.1μF 5.9K L1 0.47μH VDDQ 1.5V 20A MT1 COUT2 330μF w2 TG2 SW1 SW2 2.74K MT2 DB1 DB2 2.2Ω COUT1 100μF TG1 DRVCC1 INTVCC L1 0.47μH DRVCC2 EXTVCC COUT4 330μF 4.7μF 1μF MB1 BG1 BG2 1Ω VDDQSNS 1μF VOUTSENSE1+ 20k VOUTSENSE1– 100k PGOOD PGOOD 0.01μF ITH1 1500pF 12.
LTC3876 APPLICATIONS INFORMATION SENSE2– SENSE2 VTTSNS PGOOD2 BOOST2 + CB2 LTC3876 DRVCC2 EXTVCC ITH2 CITH2(2) RT CITH2(1) COUT2 PGND CVIN VIN VRNG1 CDRVCC VIN RVIN GND + CIN CERAMIC COUT1 DRVCC1 RITH1(1) DB1 ITH1 CITH1(1) MT1 MB1 BG1 SW1 TRACK/SS1 RFB2(1) CERAMIC CINTVCC + RT MB2 RINTVCC + VRNG2 PHASMD MODE/PLLIN CLKOUT SGND LOCALIZED SGND TRACE RITH2(1) MT2 INTVCC CVCC RSENSE2 VOUT2 DB2 CITH1(2) RITH1(2) L2 TG2 SW2 BG2 CSS1 RSENSE1 VOUT1 TG1 VOUTSENSE1+ RFB1(1)
LTC3876 APPLICATIONS INFORMATION • Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. Connect the copper areas to DC rails only, e.g., PGND. PCB Layout Debugging Only after each controller is checked for its individual performance should both controllers be turned on at the same time. It is helpful to use a DC-50MHz current probe to monitor the current in the inductor while testing the circuit.
LTC3876 APPLICATIONS INFORMATION VIN 4.5V TO 14V CIN1 180μF w2 CIN2 10μF w3 2.2Ω LTC3876 1μF VIN SENSE1– SENSE2– SENSE1+ SENSE2+ BOOST1 BOOST2 0.1μF 0.1μF 0.1μF 0.1μF 5.9k L1 0.47μH VDDQ 1.8V 20A MT1 COUT2 330μF w2 TG2 SW1 SW2 2.74k MT2 DB1 DB2 2.2Ω DRVCC1 INTVCC DRVCC2 EXTVCC BG1 MB1 BG2 1μF VOUTSENSE1+ 20k VOUTSENSE1– PGOOD 0.01μF 12.7k PGOOD VTTRVCC VTTSNS 2.2μF VTTR TRACK/SS1 120pF 1500pF 100k ITH1 DTR1 VRNG1 RT SGND RUN COUT3 100μF 1Ω VDDQSNS 100k VTT 0.
LTC3876 APPLICATIONS INFORMATION VIN 4.5V TO 28V CIN1 100μF CIN2 10μF w3 2.2Ω LTC3876 1μF VIN 100Ω SENSE1– SENSE2– SENSE1+ SENSE2+ BOOST1 BOOST2 100Ω 1nF 100Ω 1nF 100Ω 0.1μF R31 VDDQ 1V 20A L1 0.67μH COUT2 330μF w2 TG1 MT1 TG2 MT2 DB1 DB2 SW1 2.2Ω 0.002Ω COUT1 100μF 0.1μF DRVCC1 INTVCC DRVCC2 EXTVCC BG1 MB1 BG2 VDDQSNS 1μF VOUTSENSE1+ VOUTSENSE1– PGOOD 0.1μF 220pF 18.2k 113k PGOOD VTTRVCC VTTSNS 2.
LTC3876 APPLICATIONS INFORMATION VIN 4.5V TO 38V CIN1 100μF CIN2 10μF w4 2.2Ω LTC3876 1μF VIN – SENSE1 SENSE2– SENSE1+ SENSE2+ BOOST1 BOOST2 1nF 0.1μF R31 0.002Ω VDDQ 1.2V 20A L1 0.82μH 1nF 2.49Ω TG1 MT1 COUT2 330μF w4 TG2 MT2 DB1 DB2 SW1 2.2Ω COUT1 100μF 0.1μF 1.15Ω DRVCC2 EXTVCC 4.7μF BG1 MB1 BG2 MB2 PGND 20k VOUTSENSE1– PGOOD 0.01μF 13.7k 560pF 86.6k 118k PGOOD VTTSNS 2.2μF VTTR ITH1 1800pF 4.
LTC3876 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UHF Package 38-Lead Plastic QFN (5mm × 7mm) (Reference LTC DWG # 05-08-1701 Rev C) 0.70 p 0.05 5.50 p 0.05 5.15 ± 0.05 4.10 p 0.05 3.00 REF 3.15 ± 0.05 PACKAGE OUTLINE 0.25 p 0.05 0.50 BSC 5.5 REF 6.10 p 0.05 7.50 p 0.05 RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 p 0.10 0.75 p 0.05 PIN 1 NOTCH R = 0.30 TYP OR 0.35 s 45o CHAMFER 3.
LTC3876 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 38-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1772 Rev C) Exposed Pad Variation AA 4.75 REF 38 9.60 – 9.80* (.378 – .386) 4.75 REF (.187) 20 6.60 ±0.10 2.74 REF 4.50 REF SEE NOTE 4 6.40 2.74 REF (.252) (.108) BSC 0.315 ±0.05 1.05 ±0.10 0.50 BSC RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.50 – 0.75 (.020 – .030) 0.09 – 0.20 (.0035 – .
LTC3876 TYPICAL APPLICATION 4.5V to 5.5V Input, VDDQ 1.5V/20A and VTT 0.75V/±10A Output, 1.2MHz, RSENSE, Step-Down Converter VIN 4.5V TO 5.5V CIN1 180μF CIN2 10μF w3 2.2Ω LTC3876 1μF VIN 100Ω 1nF SENSE1– SENSE2– SENSE1+ SENSE2+ BOOST1 BOOST2 100Ω 1nF 100Ω 649Ω 100Ω 0.1μF R31 0.002Ω VDDQ 1.5V 20A L1 0.18μH 0.1μF TG1 MT1 COUT2 330μF w2 MT2 SW1 VTT 0.75A ±10A DRVCC2 EXTVCC VIN COUT4 330μF 4.7μF 1μF MB1 BG1 BG2 1Ω VDDQSNS 30.1k 1μF VOUTSENSE1+ 20k VOUTSENSE1– PGOOD 0.
