Datasheet

LTC3873
11
3873fa
plus the secondary-to-primary referred voltage of the
fl yback pulse (including leakage spike) must not exceed
the allowed external MOSFET breakdown rating.
Leakage Inductance
Transformer leakage inductance (on either the primary
or secondary) causes a voltage spike to occur after the
output switch (Q1) turn-off. This is increasingly prominent
at higher load currents where more stored energy must
be dissipated. In some cases a “snubber” circuit will be
required to avoid overvoltage breakdown at the MOSFET’s
drain node. Application Note 19 is a good reference on
snubber design. A bifi lar or similar winding technique is a
good way to minimize troublesome leakage inductances.
However, remember that this will limit the primary-to-
secondary breakdown voltage, so bifi lar winding is not
always practical.
Power MOSFET Selection
The power MOSFET serves two purposes in the LTC3873:
it represents the main switching element in the power path
and its R
DS(ON)
represents the current sensing element
for the control loop. Important parameters for the power
MOSFET include the drain-to-source breakdown voltage
(BV
DSS
), the threshold voltage (V
GS(TH)
), the on-resistance
(R
DS(ON)
) versus gate-to-source voltage, the gate-to-source
and gate-to-drain charges (Q
GS
and Q
GD
, respectively),
the maximum drain current (I
D(MAX)
) and the MOSFET’s
thermal resistances (R
TH(JC)
and R
TH(JA)
).
For boost applications with R
DS(ON)
sensing, refer to
the LTC3872 data sheet for the selection of MOSFET
R
DS(ON)
.
MOSFETs have conduction losses (I
2
R) and switching
losses. For V
DS
< 20V, high current effi ciency generally
improves with large MOSFETs with low R
DS(ON)
, while
for V
DS
> 20V the transition losses rapidly increase to the
point that the use of a higher R
DS(ON)
device with lower
reverse transfer capacitance, C
RSS
, actually provides
higher effi ciency.
Output Capacitors
The output capacitor is normally chosen by its effective
series resistance (ESR), which determines output ripple
voltage and affects effi ciency. Low ESR ceramic capaci-
tors are often used to minimize the output ripple. Boost
regulators have large RMS ripple current in the output
capacitor that must be rated to handle the current. The
output ripple current (RMS) is:
II
VV
V
RMS COUT OUT MAX
OUT IN MIN
IN MIN
() ()
()
()
•
–
≈
Output ripple is then simply:
V
OUT
= R
ESR
(ΔI
L(RMS)
)
The output capacitor for fl yback converter should have a
ripple current rating greater than:
II
D
D
RMS OUT
MAX
MAX
= •
–1
Input Capacitors
The input capacitor of a boost converter is less critical due
to the fact that the input current waveform is triangular, and
does not contain large square wave currents as found in
the output capacitor. The input voltage source impedance
determines the size of the capacitor that is typically 10F to
100F. A low ESR is recommended although not as critical
as the output capacitor can be on the order of 0.3Ω.
The RMS input ripple current for a boost converter is:
I
V
Lf
D
RMS CIN
IN MIN
MAX()
()
.•
•
•= 03
Please note that the input capacitor can see a very high
surge current when a battery is suddenly connected to the
input of the converter and solid tantalum capacitors can
fail catastrophically under these conditions.
APPLICATIONS INFORMATION