Datasheet

LTC3872
10
3872fc
For more information www.linear.com/LTC3872
to 30V or less, and the switch node can ring during the
turn-off of the MOSFET due to layout parasitics. Check
the switching waveforms of the MOSFET directly across
the drain and source terminals using the actual PC board
layout (not just on a lab breadboard!) for excessive ringing.
During the switch on-time, the control circuit limits the
maximum voltage drop across the power MOSFET to about
270mV, 100mV and 170mV at low duty cycle with IPRG
tied to V
IN
, GND, or left floating respectively. The peak
inductor current is therefore limited to (270mV, 170mV and
100mV)/R
DS(ON)
depending on the status of the IPRG pin.
The relationship between the maximum load current, duty
cycle and the R
DS(ON)
of the power MOSFET is:
R
DS(ON)
V
SENSE(MAX)
1D
MAX
1+
χ
2
I
O(MAX)
ρ
T
V
SENSE(MAX)
is the maximum voltage drop across the
power MOSFET. V
SENSE(MAX)
is typically 270mV, 170mV and
100mV. It is reduced with increasing duty cycle as shown
in Figure 3. The r
T
term accounts for the temperature co-
efficient of the R
DS(ON)
of the MOSFET, which is typically
0.4%/°C. Figure 4 illustrates the variation of normalized
R
DS(ON)
over temperature for a typical power MOSFET.
Another method of choosing which power MOSFET to
use is to check what the maximum output current is for a
given R
DS(ON)
, since MOSFET on-resistances are available
in discrete values.
I
O(MAX)
= V
SENSE(MAX)
1–D
MAX
1+
χ
2
R
DS(ON)
ρ
T
It is worth noting that the 1 – D
MAX
relationship between
I
O(MAX)
and R
DS(ON)
can cause boost converters with a
wide input range to experience a dramatic range of maxi-
mum input and output current. This should be taken into
consideration in applications where it is important to limit
the maximum current drawn from the input supply
.
Voltage on the NGATE pin should be within –0.3V to
(V
IN
+0.3V) limits. Voltage stress below –0.3V and above
V
IN
+ 0.3V can damage internal MOSFET driver, see Func-
tional Diagram. This is especially important in case of
driving MOSFETs with relatively high package inductance
(DPAK and bigger) or inadequate layout. A small Schottky
diode between NGATE pin and ground can prevent nega
-
tive voltage spikes. T
wo small Schottky diodes can inhibit
positive and negative voltage spikes (Figure 5).
JUNCTION TEMPERATURE (°C)
50
ρ
T
NORMALIZED ON RESISTANCE
1.0
1.5
150
3872 F04
0.5
0
0
50
100
2.0
Figure 4. Normalized R
DS(ON)
vs Temperature
Figure 5
Figure 3. Maximum SENSE Threshold Voltage vs Duty Cycle
DUTY CYCLE (%)
1
0
MAXIMUM CURRENT SENSE VOLTAGE (mV)
50
100
150
200
250
300
20 40 60 80
3872 G03
100
IPRG = HIGH
IPRG = FLOAT
IPRG = LOW
applicaTions inForMaTion
SW
GND
V
IN
NGATE
3872 F04
LTC3872
SW
GND
V
IN
NGATE
LTC3872