Datasheet

LTC3867
10
3867f
BLOCK DIAGRAM
OPERATION
+
++
SLEEP
INTV
CC
0.55V
+
+
0.5V
SS
+
1.22V
RUN
1.25µA
V
IN
EA
I
TH
R
C
C
C1
C
SS
RUN TK/SS
0.6V
REF
S
R
Q
5.3V
REG
IFAST
SLOPE RECOVERY
ACTIVE CLAMP
OSC
MODE/SYNC
DETECT
SLOPE
COMPENSATION
UVLO
1
51k
I
THB
1.0µA/5.0µA
IFAST
FREQ
MODE/PLLIN
ITEMP
0.6V
BURSTEN
EXTV
CC
ITSD
I
LIM
+
+
I
COMP
I
REV
F
+
4.7V
F
3k
+
+
OV
UV
+
DIFFAMP
0.555V
V
FB
PGOOD
PGND
C
VCC
C
B
M1
M2
V
OUT
L1
INTV
CC
V
IN
C
OUT
D
B
BG
SENSE
SENSE
+
SW
TG
BOOST
INTV
CC
DIFFOUT
DIFF
3867 BD
DIFF
+
SGND
0.645V
20k
20k
SWITCH
LOGIC
AND
ANTISHOOT-
THROUGH
OV
RUN
ON
FCNT
PLL-SYNC
TEMPSNS
+
C
IN
+
V
IN
1/2
Main Control Loop
The LTC3867 uses a constant frequency, current mode
step-down architecture. During normal operation, the
top MOSFET is turned on every cycle when the oscillator
sets the RS latch, and turned off when the main current
comparator, I
CMP
, resets the RS latch. The peak inductor
current at which I
CMP
resets the RS latch is controlled by
the voltage on the I
TH
pin, which is the output of the er-
ror amplifier, EA. The remote sense amplifier (DIFFAMP)
produces a signal equal to the differential voltage sensed
across the output capacitor divided down by the feedback
divider and re-references it to the local IC ground reference.