Datasheet

LTC3866
19
3866fb
due to the drain-to-gate accumulation capacitance and
the gate-to-source capacitance. The Miller charge (the
increase in coulombs on the horizontal axis from a to b
while the curve is flat) is specified for a given V
DS
drain
voltage, but can be adjusted for different V
DS
voltages by
multiplying the ratio of the application V
DS
to the curve
specified V
DS
values. A way to estimate the C
MILLER
term
is to take the change in gate charge from points a and b
on a manufacturer’s data sheet and divide by the stated
V
DS
voltage specified. C
MILLER
is the most important se-
lection criteria for determining the transition loss term in
the top MOSFET but is not directly specified on MOSFET
data sheets. C
RSS
and C
OS
are specified sometimes but
definitions of these parameters are not included. When the
controller is operating in continuous mode the duty cycles
for the top and bottom MOSFETs are given by:
Main Switch Duty Cycle =
V
OUT
V
IN
Synchronous SwitchDuty Cycle =
V
IN
– V
OUT
V
IN






The power dissipation for the main and synchronous
MOSFETs at maximum output current are given by:
P
MAIN
=
V
OUT
V
IN
I
MAX
( )
2
1+ δ
( )
R
DS(ON)
+
V
IN
( )
2
I
MAX
2






R
DR
( )
C
MILLER
( )
•
1
V
INTVCC
– V
TH(MIN)
+
1
V
TH(MIN)








• f
P
SYNC
=
V
IN
– V
OUT
V
IN
I
MAX
( )
2
1+ δ
( )
R
DS(ON)
where δ is the temperature dependency of R
DS(ON)
, R
DR
is the effective top driver resistance (approximately 2Ω at
V
GS
= V
MILLER
), V
IN
is the drain potential and the change
in drain potential in the particular application. V
TH(MIN)
is the data sheet specified typical gate threshold voltage
specified in the power MOSFET data sheet at the specified
drain current. C
MILLER
is the calculated capacitance using
the gate charge curve from the MOSFET data sheet and
the technique described above.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V
IN
< 20V,
the high current efficiency generally improves with larger
MOSFETs, while for V
IN
> 20V, the transition losses rapidly
increase to the point that
the use of a higher R
DS(ON)
device
with lower C
MILLER
actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1 + δ ) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
An optional Schottky diode across the synchronous
MOSFET conducts during the dead time between the con-
duction of the two large power MOSFETs. This prevents the
body diode of the bottom MOSFET from turning on, storing
charge during the dead time and requiring a reverse-recov-
ery period which
could cost as much as several percent in
efficiency. A 2A to 8A Schottky is generally a good com-
promise for both regions of operation due to the relatively
small average current. Larger diodes result in additional
transition loss due to their larger junction capacitance.
C
IN
and C
OUT
Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (
V
OUT
)/(V
IN
). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current of one channel must be used. The
maximum RMS capacitor current is given by:
C
IN
Required I
RMS
≈
I
MAX
V
IN
V
OUT
( )
V
IN
– V
OUT
( )




1/2
APPLICATIONS INFORMATION
Figure 7. Gate Charge Characteristic
+
–
V
DS
V
IN
3766 F07
V
GS
MILLER EFFECT
Q
IN
a b
C
MILLER
= (Q
B
– Q
A
)/V
DS
V
GS
V
+
–