Datasheet

LTC3862-1
18
38621f
OPERATION
Table 1
PHASEMODE
CH-1 to CH-2
PHASE
CH-1 to CLKOUT
PHASE APPLICATION
SGND 180° 90° 2-Phase, 4-Phase
Float 180° 60° 6-Phase
3V8 120° 240° 3-Phase
Using the LTC3862-1 Transconductance (g
m
) Error
Amplifi er in Multi-Phase Applications
The LTC3862-1 error amplifi er is a transconductance, or g
m
amplifi er, meaning that it has high DC gain but high output
impedance (the output of the error amplifi er is a current
proportional to the differential input voltage). This style
of error amplifi er greatly eases the task of implementing
a multi-phase solution, because the amplifi ers from two
or more chips can be connected in parallel. In this case
the FB pins of multiple LTC3862-1s can be connected to-
gether, as well as the ITH pins, as shown in Figure 8. The
g
m
of the composite error amplifi er is simply n times the
transconductance of one amplifi er, or g
m(TOT)
= n • 660S,
where n is the number of amplifi ers connected in paral-
lel. The transfer function from the ITH pin to the current
comparator inputs was carefully designed to be accurate,
both from channel-to-channel and chip-to-chip. This way
the peak inductor current matching is kept accurate.
A buffered version of the output of the error amplifi er deter-
mines the threshold at the input of the current comparator.
The ITH voltage that represents zero peak current is 0.4V
and the voltage that represents current limit is 1.2V (at
low duty cycle). During an overload condition, the output
of the error amplifi er is clamped to 2.6V at low duty cycle,
in order to reduce the latency when the overload condition
terminates. A patented circuit in the LTC3862-1 is used
to recover the slope compensation signal, so that the
maximum peak inductor current is not a strong function
of the duty cycle.
Soft-Start
The start-up of the LTC3862-1 is controlled by the volt-
age on the SS pin. An internal PNP transistor clamps the
current comparator sense threshold during soft-start,
thereby limiting the peak switch current. The base of the
PNP is connected to the SS pin and the emitter to an
Figure 8. LTC3862-1 Error Amplifi er Confi guration
for Multi-Phase Operation
internal, buffered ITH node (please note that the ITH pin
voltage may not track the soft-start voltage during this time
period). An internal 5A current source charges the SS
capacitor, and clamps the peak sense threshold until the
voltage on the soft-start capacitor reaches approximately
0.6V. The required amount of soft-start capacitance can
be estimated using the following equation:
C
SS
= 5µA
t
SS
0.6V






The SS pin has an internal open-drain NMOS pull-down
transistor that turns on when the RUN pin is pulled low,
when the voltage on the INTV
CC
pin is below its undervoltage
lockout threshold, or during an overtemperature condi-
tion. In multi-phase applications that use more than one
FREQ
FB
CLKOUT
SYNC
PLLFLTR
LTC3862-1
MASTER
SGND
ITH
V
OUT
INTV
CC
SS
RUN
ON/OFF
CONTROL
ALL RUN PINS
CONNNECTED
TOGETHER
INDIVIDUAL
INTV
CC
PINS
LOCALLY
DECOUPLED
FREQ
FB
CLKOUT
SYNC
PLLFLTR
LTC3862-1
SLAVE
SGND
ITH
INTV
CC
SS
RUN
SLAVE
38621 F08
ALL SS PINS
CONNNECTED
TOGETHER
FREQ
FB
ALL FB PINS
CONNECTED
TOGETHER
ALL ITH PINS
CONNECTED
TOGETHER
CLKOUT
SYNC
PLLFLTR
LTC3862-1
SGND
ITH
INTV
CC
SS
RUN