LTC3862-1 Multi-Phase Current Mode Step-Up DC/DC Controller DESCRIPTION FEATURES n n n n n n n n n n n n n n n Wide VIN Range: 8.
LTC3862-1 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Input Supply Voltage (VIN) ......................... –0.3V to 40V INTVCC Voltage .......................................... –0.3V to 11V INTVCC LDO RMS Output Current .........................50mA RUN Voltage ................................................ –0.3V to 8V SYNC Voltage ............................................... –0.3V to 6V SLOPE, PHASEMODE, DMAX, BLANK Voltage ........................................... –0.
LTC3862-1 ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3862EUH-1#PBF LTC3862EUH-1#TRPBF 38621 24-Lead (5mm × 5mm) Plastic QFN –40°C to 85°C LTC3862IUH-1#PBF LTC3862IUH-1#TRPBF 38621 24-Lead (5mm × 5mm) Plastic QFN –40°C to 125°C LTC3862HUH-1#PBF LTC3862HUH-1#TRPBF 38621 24-Lead (5mm × 5mm) Plastic QFN –40°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges.
LTC3862-1 ELECTRICAL CHARACTERISTICS (Notes 2, 3) The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, RUN = 2V and SS = open, unless otherwise noted.
LTC3862-1 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency and Power Loss vs Input Voltage Efficiency vs Output Current 100 95 100 VOUT = 72V 90 98 EFFICIENCY (%) EFFICIENCY (%) 80 75 70 VIN = 32V 65 60 55 4000 96 95 3500 94 EFFICIENCY 3000 93 92 2500 POWER LOSS 91 VIN = 24V 50 4500 97 90 POWER LOSS (mW) VIN = 9V 85 2000 89 45 40 5000 VON = 72V IOUT = 0.
LTC3862-1 TYPICAL PERFORMANCE CHARACTERISTICS INTVCC Line Regulation INTVCC Load Regulation 10.2 INTVCC vs Temperature 10.10 10.05 10.03 10.05 10.0 INTVCC VOLTAGE (V) 10.1 INTVCC VOLTAGE (V) INTVCC VOLTAGE (V) 10.04 10.00 9.9 9.95 9.8 9.90 10.02 10.01 10.00 9.99 9.98 9.97 9.
LTC3862-1 TYPICAL PERFORMANCE CHARACTERISTICS Maximum Current Sense Threshold vs Duty Cycle RUN Threshold vs Temperature MAXIMUM CURRENT SENSE THRESHOLD (mV) 80 RUN Threshold vs Input Voltage 1.5 1.30 75 SLOPE = 1.66 60 55 SLOPE = 1 50 45 1.4 ON 1.25 RUN PIN VOLTAGE (V) 65 RUN PIN VOLTAGE (V) SLOPE = 0.625 70 1.20 OFF 1.15 ON 1.2 OFF 1.1 40 35 30 0 1.10 –50 –25 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%) 1.
LTC3862-1 TYPICAL PERFORMANCE CHARACTERISTICS Oscillator Frequency vs Input Voltage RFREQ vs Frequency 320 Frequency vs PLLFLTR Voltage 1000 1400 315 1200 300 295 FREQUENCY (kHz) 305 RFREQ (kΩ) FREQUENCY (kHz) 310 100 1000 200 285 20 24 16 28 INPUT VOLTAGE (V) 12 32 10 36 0 0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (kHz) 1.235 1.233 430 1.231 380 MINIMUM ON-TIME (ns) 1.223 1.221 1.219 1.217 1.215 1.5 2.
LTC3862-1 PIN FUNCTIONS 3V8: Output of the Internal 3.8V LDO from INTVCC. Supply pin for the low voltage analog and digital circuits. A low ESR 1nF ceramic bypass capacitor should be connected between 3V8 and SGND, as close as possible to the IC. ITH: Error Amplifier Output. The current comparator trip threshold increases with the ITH control voltage. The ITH pin is also used for compensating the control loop of the converter. BLANK: Blanking Time.
LTC3862-1 PIN FUNCTIONS SENSE1+, SENSE2+: Positive Inputs to the Current Comparators. The ITH pin voltage programs the current comparator offset in order to set the peak current trip threshold. This pin is normally connected to a sense resistor in the source of the power MOSFET. SENSE1–, SENSE2–: Negative Inputs to the Current Comparators. This pin is normally connected to the bottom of the sense resistor. SGND: Signal Ground. All feedback and soft-start connections should return to SGND.
LTC3862-1 FUNCTIONAL DIAGRAM CLKOUT SYNC SYNC DETECT PLLFLTR VIN VIN RP CIN 10V LDO CP INTVCC DMAX PHASEMODE UV CLK1 VCO FREQ OT CLK2 RFREQ CVCC 3.
LTC3862-1 OPERATION The Control Loop The LTC3862-1 uses a constant frequency, peak current mode step-up architecture with its two channels operating 180 degrees out of phase. During normal operation, each external MOSFET is turned on when the clock for that channel sets the PWM latch, and is turned off when the main current comparator, ICMP, resets the latch.
LTC3862-1 OPERATION In multi-phase applications, all of the FB pins are connected together and all of the error amplifier output pins (ITH) are connected together. The INTVCC pins, however, should not be connected together. The INTVCC regulator is capable of sourcing current but is not capable of sinking current.
LTC3862-1 OPERATION Thermal Shutdown Protection In the event of an overtemperature condition (external or internal), an internal thermal monitor will shut down the gate drivers and reset the soft-start capacitor if the die temperature exceeds 170°C. This thermal sensor has a hysteresis of 10°C to prevent erratic behavior at hot temperatures. The LTC3862-1’s internal thermal sensor is intended to protect the device during momentary overtemperature conditions.
LTC3862-1 OPERATION Operation at High Supply Voltage At high input voltages, the LTC3862-1’s internal LDO can dissipate a significant amount of power, which could cause the maximum junction temperature to be exceeded. Conditions such as a high operating frequency, or the use of more than one power MOSFET per channel, could push the junction temperature rise to high levels.
LTC3862-1 OPERATION Operation of the RUN Pin VIN The control circuitry in the LTC3862-1 is turned on and off using the RUN pin. Pulling the RUN pin below 1.22V forces shutdown mode and releasing it allows a 0.5μA current source to pull this pin up, allowing a “normally on” converter to be designed. Alternatively, the RUN pin can be externally pulled up or driven directly by logic. Care must be taken not to exceed the absolute maximum rating of 8V for this pin.
LTC3862-1 OPERATION The operating frequency of the LTC3862-1 can be approximated using the following formula: 1000 RFREQ (kΩ) The LTC3862-1 uses a constant frequency architecture that can be programmed over a 75kHz to 500kHz range using a single resistor from the FREQ pin to ground. Figure 6 illustrates the relationship between the FREQ pin resistance and the operating frequency. 100 RFREQ = 5.5096E9(fOSC)–0.
LTC3862-1 OPERATION Table 1 MASTER FREQ PHASEMODE CH-1 to CH-2 PHASE CH-1 to CLKOUT PHASE APPLICATION SGND 180° 90° 2-Phase, 4-Phase Float 180° 60° 6-Phase 3V8 120° 240° 3-Phase INTVCC ON/OFF CONTROL RUN ITH LTC3862-1 SS FB VOUT CLKOUT INDIVIDUAL INTVCC PINS LOCALLY DECOUPLED SYNC PLLFLTR SGND Using the LTC3862-1 Transconductance (gm) Error Amplifier in Multi-Phase Applications The LTC3862-1 error amplifier is a transconductance, or gm amplifier, meaning that it has high DC gain but h
LTC3862-1 OPERATION LTC3862-1 chip, connect all of the SS pins together and use one external capacitor to program the soft-start time. In this case, the current into the soft-start capacitor will be ISS = n • 5μA, where n is the number of SS pins connected together. Figure 9 illustrates the start-up waveforms for a 2-phase LTC3862-1 application. SW1 50V/DIV SW2 50V/DIV IL1 500mA/DIV IL2 500mA/DIV VIN = 51V VOUT = 72V LIGHT LOAD (10mA) RUN 5V/DIV VOUT 100V/DIV 2μs/DIV 3862 F10 Figure 10.
LTC3862-1 OPERATION the slope compensation is too low the converter can suffer from excessive jitter or, worst case, sub-harmonic oscillation. When excess slope compensation is applied to the internal current sense signal, the phase margin of the control loop suffers. Figure 11 illustrates inductor current waveforms for a properly compensated loop.
LTC3862-1 OPERATION 96% MAXIMUM DUTY CYCLE WITH DMAX = SGND MINIMUM ON-TIME AT LIGHT LOAD WITH BLANK = SGND INDUCTOR CURRENT 200mA/DIV INDUCTOR CURRENT 1A/DIV GATE 5V/DIV SW NODE 20V/DIV SW NODE 20V/DIV 1μs/DIV 500ns/DIV VIN = 36V VOUT = 72V MEASURED ON-TIME = 210ns 84% MAXIMUM DUTY CYCLE WITH DMAX = FLOAT MINIMUM ON-TIME AT LIGHT LOAD WITH BLANK = FLOAT INDUCTOR CURRENT 200mA/DIV GATE 5V/DIV SW NODE 20V/DIV SW NODE 20V/DIV INDUCTOR CURRENT 1A/DIV 1μs/DIV VIN = 36V 500ns/DIV VOUT = 72V MEASURE
LTC3862-1 OPERATION The SENSE+ and SENSE– Pins The SENSE+ and SENSE– pins are high impedance inputs to the CMOS current comparators for each channel. Nominally, there is no DC current into or out of these pins. There are ESD protection diodes connected from these pins to SGND, although even at hot temperature the leakage current into the SENSE+ and SENSE– pins should be less than 1μA. Since the LTC3862-1 contains leading edge blanking, an external RC filter is not required for proper operation.
LTC3862-1 OPERATION The ITH series RC • CC filter sets the dominant pole-zero loop compensation. The transfer function for boost and flyback converters contains a right half plane zero that normally requires the loop crossover frequency to be reduced significantly in order to maintain good phase margin. The RC • CC filter values can typically be modified slightly (from 0.
LTC3862-1 APPLICATIONS INFORMATION Typical Boost Applications Circuit Minimum On-Time Limitations A basic 2-phase, single output LTC3862-1 application circuit is shown in Figure 18. External component selection is driven by the characteristics of the load and the input supply. In a single-ended boost converter, two steady-state conditions can result in operation at the minimum on-time of the controller. The first condition is when the input voltage is close to the output voltage.
LTC3862-1 APPLICATIONS INFORMATION Maximum Duty Cycle Limitations Another operating extreme occurs at high duty cycle, when the input voltage is low and the output voltage is high. In this case: VO + VF – VIN(MIN) DMAX = VO + VF A single-ended boost converter needs a minimum off-time every cycle in order to allow energy transfer from the input inductor to the output capacitor. This minimum off-time translates to a maximum duty cycle for the converter.
LTC3862-1 APPLICATIONS INFORMATION The inductor saturation current rating needs to be higher than the worst-case peak inductor current during an overload condition. If IO(MAX) is the maximum rated load current, then the maximum current limit value (IO(CL)) would normally be chosen to be some factor (e.g., 30%) greater than IO(MAX). IO(CL) = 1.
LTC3862-1 APPLICATIONS INFORMATION result, some iterative calculation is normally required to determine a reasonably accurate value. The power dissipated by the MOSFET in a multi-phase boost converter with n phases is: 2 IO(MAX) PFET = • RDS(ON) • DMAX • T n • (1– DMAX ) + k • VOUT 2 • IO(MAX) n • (1– DMAX ) • CRSS • f The first term in the equation above represents the I2R losses in the device, and the second term, the switching losses. The constant, k = 1.
LTC3862-1 APPLICATIONS INFORMATION For a boost converter where the current limit value is chosen to be 30% higher than the maximum load current, the peak current in the MOSFET and sense resistor is: 1 1.3 •IO(MAX) ISW(MAX) =IR(SENSE) = • 1+ • n 2 1– DMAX TD = TA + PR(SENSE) • RTH(JA) Selecting the Output Diodes The sense resistor value is then: RSENSE = The resistor temperature can be calculated using the equation: VSENSE(MAX) • n • (1– DMAX ) 1.
LTC3862-1 APPLICATIONS INFORMATION additional power dissipation is important when deciding on a diode current rating, package type, and method of heat sinking. To a close approximation, the power dissipated by the diode is: PD = ID(PEAK) • VF(PEAK) • (1 – DMAX) The diode junction temperature is: TJ = TA + PD • RTH(JA) The RTH(JA) to be used in this equation normally includes the RTH(JC) for the device plus the thermal resistance from the board to the ambient temperature in the enclosure.
LTC3862-1 APPLICATIONS INFORMATION For the bulk capacitance, which we assume contributes 1% to the total output ripple, the minimum required capacitance is approximately: COUT ≥ IO(MAX) 0.01• n • VOUT • f For many designs it will be necessary to use one type of capacitor to obtain the required ESR, and another type to satisfy the bulk capacitance. For example, using a low ESR ceramic capacitor can minimize the ESR step, while an electrolytic capacitor can be used to supply the required bulk C.
LTC3862-1 APPLICATIONS INFORMATION The value of the input capacitor is a function of the source impedance, and in general, the higher the source impedance, the higher the required input capacitance. The required amount of input capacitance is also greatly affected by the duty cycle. High output current applications that also experience high duty cycles can place great demands on the input supply, both in terms of DC current and ripple current.
LTC3862-1 APPLICATIONS INFORMATION VIN 8.5V TO 36V L1 58μH PA2050-583 D1 MURS320T3H 1nF DMAX 3V8 SLOPE SENSE1+ BLANK Q1 HAT2267H 10Ω 0.020Ω 1W 10nF – 24.9k 0.1μF 150k 1μF SS 1.5nF LTC3862-1 45.3k ITH INTVCC GATE1 5.62k 10Ω 2.2μF 100V ×6 Q2 HAT2267H GATE2 SENSE2– SYNC PLLFLTR 0.020Ω 1W PGND SGND CLKOUT VOUT 72V 2A (MAX) 47μF 100V 4.7μF FB 324k 6.8μF 50V VIN 100pF VOUT 6.8μF 50V 6.8μF 50V + RUN FREQ + PHASEMODE SENSE1 45.
LTC3862-1 APPLICATIONS INFORMATION The inductor value chosen was 57.8μH and the part number is PA2050-583, manufactured by Pulse Engineering. This inductor has a saturation current rating of 5A. 8. The power MOSFET chosen for this application is a Renesas HAT2267H. This MOSFET has a typical RDS(ON) of 13mΩ at VGS = 10V. The BVDSS is rated at a minimum of 80V and the maximum continuous drain current is 25A. The typical gate charge is 30nC for a VGS = 10V.
LTC3862-1 APPLICATIONS INFORMATION For the bulk capacitance, which we assume contributes 1% to the total output ripple, the minimum required capacitance is approximately: COUT ≥ IO(MAX) 0.01• n • VOUT • f = 1.5A 0.01• 2 • 72V • 300kHz = 3.45µF For this application, in order to obtain both low ESR and an adequate ripple current rating (see Figure 23), two 47μF, 100V aluminum electrolytic capacitors were connected in parallel with six 2.2μF, 100V ceramic capacitors.
LTC3862-1 APPLICATIONS INFORMATION 10. The output resistor divider should be located as close as possible to the IC, with the bottom resistor connected between FB and SGND. The PCB trace connecting the top resistor to the upper terminal of the output capacitor should avoid any high frequency switching nodes. 14. Keep the MOSFET drain nodes (SW1, SW2) away from sensitive small-signal nodes, especially from the opposite channel’s current-sensing signals.
LTC3862-1 TYPICAL APPLICATION A 24V Input, 48V/6A Output 2-Phase Boost Converter Application Circuit VIN 8.5V TO 36V L1 19μH PA2050-193 D1 30BQ060 1nF 3V8 BLANK 10nF PHASEMODE SENSE1 45.3k – 22μF 25V 24.9k RUN FREQ 0.1μF 4.7nF 1μF LTC3862-1 30.1k FB 7.87k 22μF 25V 301k VOUT CLKOUT 10μF 50V GATE1 PGND 0.005Ω 1W 10Ω 10μF 50V Q2 HAT2279H GATE2 SENSE2– L2 19μH PA2050-193 10nF SYNC PLLFLTR VOUT 48V 6A (MAX) 4.
LTC3862-1 TYPICAL APPLICATION A 24V Input, 107V/1.5A Output 2-Phase Boost Converter Application Circuit VIN 8.5V TO 36V D1 PDS4150 L1 58μH 1nF DMAX 3V8 SENSE1 + PHASEMODE SENSE1 – BLANK 68.1k 0.010Ω 1W 10nF 22μF 25V 24.9k RUN FREQ 0.1μF 44pF SS 1μF LTC3862-1 43.5k 8× 1μF 250V FB 6.65k 4.7μF INTVCC SGND 576k VOUT CLKOUT GATE1 PGND 0.010Ω 1W 10Ω Q2 Si743ODP GATE2 SENSE2– 10nF SYNC PLLFLTR VOUT 107V 1.
LTC3862-1 PACKAGE DESCRIPTION FE Package 24-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation AA 7.70 – 7.90* (.303 – .311) 3.25 (.128) 3.25 (.128) 24 23 22 21 20 19 18 17 16 15 14 13 6.60 p0.10 2.74 (.108) 4.50 p0.10 6.40 2.74 (.252) (.108) BSC SEE NOTE 4 0.45 p0.05 1.05 p0.10 0.65 BSC 1 2 3 4 5 6 7 8 9 10 11 12 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.25 REF 0.50 – 0.75 (.020 – .030) NOTE: 1.
LTC3862-1 PACKAGE DESCRIPTION UH Package 24-Lead Plastic QFN (5mm × 5mm) (Reference LTC DWG # 05-08-1747 Rev Ø) 0.75 ±0.05 5.40 ±0.05 3.90 ±0.05 3.20 ± 0.05 3.25 REF 3.20 ± 0.05 PACKAGE OUTLINE 0.30 ± 0.05 0.65 BSC RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 ± 0.10 R = 0.05 TYP 0.75 ± 0.05 BOTTOM VIEW—EXPOSED PAD R = 0.115 TYP 23 0.00 – 0.05 PIN 1 NOTCH R = 0.30 TYP OR 0.35 × 45° CHAMFER 24 0.55 ± 0.10 PIN 1 TOP MARK (NOTE 6) 1 2 5.00 ± 0.10 3.20 ± 0.
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