Datasheet

LTC3861
31
3861fa
For more information www.linear.com/LTC3861
Other sources of loss include body or Schottky diode
conduction during the driver dependent non-overlap time
and inductor core losses.
Design Example
As a design example, consider a 2-phase application
where V
IN
= 12V, V
OUT
= 1.2V, I
LOAD
= 60A and f
SWITCH
=
300kHz. Assume that a secondary 5V supply is available
for the LTC3861 V
CC
supply.
The inductance value is chosen based on a 25% ripple
assumption. Each channel supplies an average 30A to the
load resulting in 7.7A peak-peak ripple:
ΔI
V
V
V
fL
L
OUT
OUT
IN
=
⎛
⎝
⎜
⎞
⎠
⎟
•–
•
1
A 470nH inductor per phase will create 7.7A peak-to-
peak ripple. A 0.47µH inductor with a DCR of 0.67mΩ
typical is selected from the WÜRTH 744355147 series.
Float CLKIN and connect 28kΩ from FREQ to SGND for
300kHz operation. Setting I
LIMIT
= 54A per phase leaves
plenty of headroom for transient conditions while still
adequately protecting against inductor saturation. This
corresponds to:
R
ILIM
=
18.5• 54 A • 0.67mΩ + 0.53V
20µA
= 58.5kΩ
Choose 59kΩ.
For the DCR sense filter network, we can choose R = 2.87k
and C = 220nF to match the L/DCR time constant of the
inductor.
A loop crossover frequency of 45kHz provides good tran
-
sient per
formance while
still being well below the switching
frequency of the converter. Six 330µF 9mΩ POSCAPs and
four 100µF ceramic capacitors are chosen for the output
capacitors to maintain supply regulation during severe
transient conditions and to minimize output voltage ripple.
The following compensation values (Figure 13) were
determined empirically:
R1 = 10k
R2 = 5.9k
R3 = 280Ω
C1 = 4.7nF
C2 = 100pF
C3 = 3.3nF
To set the output voltage equal to 1.2V:
R
FB1
= 10k, R
FB2
= 10k
The LTC4449 gate driver and external MOSFETs are chosen
for the power stage. DrMOSs from Fairchild, Infineon,
Vishay and others can also be used.
Printed Circuit Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the converter.
1. The connection between the SGND pin on the LTC3861
and all of the small-signal components surrounding the
IC should be isolated from the system power ground.
Place all decoupling capacitors, such as the ones on
V
CC
, between ISNSP and ISNSN etc., close to the IC. In
multiphase operation SGND should be Kelvin-connected
to the main ground node near the bottom terminal of
the input capacitor. In dual-channel operation, SGND
should be Kelvin-connected to the bottom terminal of
the output capacitor for channel 2, and channel 1 should
be remotely sensed using the remote sense differential
amplifier.
2. Place the small-signal components away from high
frequency switching nodes on the board. The LTC3861
contains remote sensing of output voltage and inductor
current and logic-level PWM outputs enabling the IC to
be isolated from the power stage.
3. The PCB traces for remote voltage and current sense
should avoid any high frequency switching nodes in
the circuit and should ideally be shielded by ground
planes. Each pair (V
SNSP
and V
SNSN
, I
SNSP
and
I
SNSN
) should be routed parallel to one another with
applicaTions inFormaTion