Datasheet

LTC3861-1
29
38611fa
For more information www.linear.com/LTC3861-1
applicaTions inFormaTion
across the current source load. The upper sloping line is
due to the drain-to-gate accumulation capacitance and
the gate-to-source capacitance. The Miller charge (the
increase in coulombs on the horizontal axis from a to b
while the curve is flat) is specified for a given V
DS
drain
voltage, but can be adjusted for different V
DS
voltages by
multiplying by the ratio of the application V
DS
to the curve
specified V
DS
values. A way to estimate the C
MILLER
term
is to take the change in gate charge from points a and b
on a manufacturers data sheet and divide by the stated
V
DS
voltage specified. C
MILLER
is the most important se-
lection criteria for determining the transition loss term in
the top MOSFET but is not directly specified on MOSFET
data sheets. C
RSS
and C
OS
are specified sometimes but
definitions of these parameters are not included.
When the controller is operating in continuous mode
the duty cycles for the top and bottom MOSFETs are
given by:
Main Switch Duty Cycle
V
V
Synchronous S
OUT
IN
=
wwitch Duty Cycle
VV
V
IN OUT
IN
–
=
The power dissipation for the main and synchronous
MOSFETs at maximum output current are given by:
P
V
V
IR
V
I
MAIN
OUT
IN
MAX DS ON
IN
MAX
=
()
++
2
2
1
2
()
(
()
δ
RRC
VV V
DR MILLER
CC TH IL TH IL
)( ) •
–
() ()
11
+
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥⎥
=
−
+
()
( )( )
()
f
P
VV
V
IR
SYNC
IN OUT
IN
MAX DS N
2
0
1 δ
where δ is the temperature dependency of R
DS(ON)
, R
DR
is the effective top driver resistance, V
IN
is the drain po-
tential and the change in drain potential in the particular
application. V
TH(IL)
is the data sheet specified typical gate
threshold voltage specified in the power MOSFET data sheet
at the specified drain current. C
MILLER
is the calculated
capacitance using the gate charge curve from the MOSFET
data sheet and the technique previously described.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs temperature curve. Typical
values for δ range from 0.005/°C to 0.01/°C depending
on the particular MOSFET used.
Multiple MOSFETs can be used in parallel to lower
R
DS(ON)
and meet the current and thermal requirements
if desired. Suitable drivers such as the LTC4449 are
capable of driving large gate capacitances without sig
-
nificantly slowing transition times. In fact, when driving
MOSFETs with very low gate charge, it is sometimes
helpful to slow down the drivers by adding small gate
resistors (5Ω or less) to reduce noise and EMI caused
by the fast transitions
MOSFET Driver Selection
Gate driver ICs, DrMOSs and power blocks
with an
interface compatible with the LTC3861-1’s three-state
PWM outputs or the LTC3861-1’s PWM/PWMEN outputs
can be used.