Datasheet

LTC3858-1
27
38581fd
APPLICATIONS INFORMATION
Figure 10. Recommended Printed Circuit Layout Diagram
C
B2
C
B1
V
OUT1
R
PU1
PGOOD1
V
PULL-UP
(<6V)
C
INTVCC
C
IN
D1
1µF
CERAMIC
M1 M2
M3
M4
D2
+
C
VIN
V
IN
R
IN
L1
L2
C
OUT1
V
OUT1
GND
V
OUT2
38581 F10
+
C
OUT2
+
R
SENSE
R
SENSE
f
IN
1µF
CERAMIC
I
TH1
V
FB1
SENSE1
+
SENSE1
–
FREQ
SENSE2
–
SENSE2
+
V
FB2
I
TH2
SS2
SS1
PGOOD1
TG1
SW1
BOOST1
BG1
V
IN
PGND
EXTV
CC
INTV
CC
BG2
BOOST2
SW2
TG2
PLLIN/MODE
RUN1
RUN2
SGND
LTC3858-1
Reduce V
IN
from its nominal level to verify operation
of the regulator in dropout. Check the operation of the
undervoltage lockout circuit by further lowering V
IN
while
monitoring the outputs to verify operation.
Investigate whether any problems exist only at higher out-
put currents or only at higher input voltages. If problems
coincide with high input voltages and low output currents,
look for capacitive coupling between the BOOST, SW, TG,
and possibly BG connections and the sensitive voltage
and current pins. The capacitor placed across the current
sensing pins needs to be placed immediately adjacent to
the pins of the IC. This capacitor helps to minimize the
effects of differential noise injection due to high frequency
capacitive coupling. If problems are encountered with
high current output loading at lower input voltages, look
for inductive coupling between C
IN
, Schottky and the top
MOSFET components to the sensitive current and voltage
sensing traces. In addition, investigate common ground