Datasheet

LTC3858-1
10
38581fd
FUNCTIONAL DIAGRAM
SW
TOP
BOOST
TG
C
B
C
IN
D
D
B
PGND
BOT
BG
INTV
CC
INTV
CC
V
IN
C
OUT
V
OUT
38581 FD
R
SENSE
DROP
OUT
DET
BOT
TOP ON
S
R
Q
Q
SHDN
SLEEP
0.425V
ICMP
2(V
FB
)
0.45V
IR
3mV
SLOPE COMP
DUPLICATE FOR SECOND
CONTROLLER CHANNEL
SENSE
+
SENSE
–
PGOOD1
V
FB1
0.88V
0.72V
L
+
–
+
–
FREQ
+
–
+
–
+
–
+
–
+
–
+
–
SWITCH
LOGIC
V
FB
R
A
C
C
R
C
C
C2
R
B
0.80V
TRACK/SS
0.88V
0.5µA
11V
RUN
I
TH
SS
+
–
C
SS
1µA
SHDN
10µA
FOLDBACK
SHDN
RST
2(V
FB
)
SHORT CKT
LATCHOFF
PLLIN/MODE
20µA
VCO
LDO
EN
INTV
CC
5.1V
SYNC
DET
100k
CLK2
CLK1
V
IN
EXTV
CC
LDO
PFD
EN
4.7V
5.1V
+
–
SGND
EA
OV
Main Control Loop
The LTC3858-1 uses a constant frequency, current mode
step-down architecture with the two controller channels
operating 180 degrees out of phase. During normal op-
eration, each external top MOSFET is turned on when the
clock for that channel sets the RS latch, and is turned off
when the main current comparator, ICMP, resets the RS
latch. The peak inductor current at which ICMP trips and
resets the latch is controlled by the voltage on the I
TH
pin,
which is the output of the error amplifi er, EA. The error
amplifi er compares the output voltage feedback signal at
OPERATION
the V
FB
pin (which is generated with an external resistor
divider connected across the output voltage, V
OUT
, to
ground) to the internal 0.800V reference voltage. When the
load current increases, it causes a slight decrease in V
FB
relative to the reference, which causes the EA to increase
the I
TH
voltage until the average inductor current matches
the new load current.
After the top MOSFET is turned off each cycle, the bottom
MOSFET is turned on until either the inductor current starts
to reverse, as indicated by the current comparator IR, or
the beginning of the next clock cycle.