Datasheet

LTC3856
31
3856f
applicaTions inForMaTion
less than f
OSC
, current is sunk continuously, pulling down
the filter network. If the external and internal frequencies
are the same but exhibit a phase difference, the current
sources turn on for an amount of time corresponding to
the phase difference. The voltage on the filter network is
adjusted until the phase and frequency of the internal and
external oscillators are identical. At the stable operating
point, the phase detector output is high impedance and
the filter capacitor C
LP
holds the voltage.
Typically, the external clock (on the PLLIN pin) input high
threshold is 1.6V, while the input low threshold is 1V.
Minimum On-Time Considerations
Minimum on-time, t
ON(MIN)
, is the smallest time duration
that the LTC3856 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that:
t
V
V f
ON MIN
OUT
IN
( )
<
( )
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase. The
minimum on-time for the LTC3856 is approximately 90ns,
with reasonably good PCB layout, minimum 30% induc-
tor current ripple and at least 10mV ripple on the current
sense signal. The minimum on-time can be affected by
PCB switching noise in the voltage and current loop. As
the peak sense voltage decreases the minimum on-time
gradually increases to 130ns. This is of particular concern
in forced continuous applications with low ripple current
at light loads. If the duty cycle drops below the minimum
on-time limit in this situation, a significant amount of cycle
skipping can occur with correspondingly larger current
and voltage ripple.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3856 circuits: 1) IC V
IN
current, 2) INTV
CC
regulator current, 3) I
2
R losses, 4) topside MOSFET
transition losses.
1. The V
IN
current is the DC supply current given in the
Electrical Characteristics table, which excludes MOSFET
driver and control currents. V
IN
current typically results
in a small (<0.1%) loss.
2. INTV
CC
current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTV
CC
to ground. The resulting dQ/dt is a current
out of INTV
CC
that is typically much larger than the
control circuit current. In continuous mode, I
GATECHG
=
f(Q
T
+ Q
B
), where Q
T
and Q
B
are the gate charges of the
topside and bottom side MOSFETs. Supplying INTV
CC
power through EXTV
CC
from an output-derived source
will scale the V
IN
current required for the driver and
control circuits by a factor of (duty cycle)/(efficiency).
For example, in a 20V to 5V application, 10mA of
INTV
CC
current results in approximately 2.5mA of V
IN
current. This reduces the mid-current loss from 10%
or more (if the driver was powered directly from V
IN
)
to only a few percent.
3. I
2
R losses are predicted from the DC resistances of
the fuse (if used), MOSFET, inductor and current sense
resistor. In continuous mode, the average output current
flows through L and R
SENSE
, but is chopped between