Datasheet

LTC3852
23
3852f
Effective Open Loop Output Resistance (R
OL
)
The effective open loop output resistance (R
OL
) of a charge
pump is a very important parameter which determines the
strength of the charge pump. The value of this parameter
depends on many factors such as the oscillator frequency
(f
OSC
), value of the fl ying capacitor (C
FLY
), the nonoverlap
time, the internal switch resistances (R
S
), and the ESR of
the external capacitors. A fi rst order approximation for
R
OL
is given below:
R
OL
2R
S
+
1
f
OSC
•C
FLY
Typical R
OL
values as a function of temperature are shown
in Figure 11.
APPLICATIONS INFORMATION
S=1 TO 4
Charge Pump Capacitor Selection
The style and value of capacitors used with the charge
pump determine several important parameters such as
regulator control loop stability, output ripple, charge pump
strength and minimum start-up time.
To reduce noise and ripple, it is recommended that low
ESR (<0.1W) ceramic capacitors be used for both C
IN
and C
PUMP
. These capacitors should be 2.2µF or greater.
Tantalum and aluminum capacitors are not recommended
because of their high ESR.
The value of C
PUMP
directly controls the amount of
output ripple for a given load current. Increasing the size
of C
PUMP
will reduce the output ripple at the expense of
3852 F11
TEMPERATURE (oC)
100
050
EFFECTIVE OPEN-LOOP OUTPUT RESISTANCE (7)
V
IN
= 2.7V
V
PUMP
= 4.5V
–50
8
7
6
5
4
Figure 11. Typical R
OL
vs Temperature
higher minimum turn-on time. The peak-to-peak output
ripple of a charge pump is approximately given by the
expression:
V
RIPPLE(PP)
I
PUMP
2f
OSC
•C
PUMP
where f
OSC
is the charge pump frequency (typically 1.2MHz)
and C
PUMP
is the value of the V
PUMP
storage capacitor.
Also, the value and style of the C
PUMP
capacitor can
signifi cantly affect the stability of the charge pump. As
shown in the Functional Diagram, the charge pump
uses a linear control loop to adjust the strength of the
charge pump to match the current required at the output.
The error signal of this loop is stored directly on the
output storage capacitor. This output capacitor also
serves to form the dominant pole of the control loop.
To prevent ringing or instability on the charge pump,
it is important to maintain at least 1µF of capacitance over
all conditions.
Excessive ESR on the C
PUMP
capacitor can degrade the
loop stability of the charge pump. Its closed loop output
resistance is designed to be 0.5W. For a 50mA load current
change, the output voltage will change by about 25mV. If
the output capacitor has 0.5W or more of ESR, the closed
loop frequency response will cease to roll off in a simple
one-pole fashion and poor load transient response or
instability could result. Ceramic capacitors typically have
exceptional ESR performance and combined with a good
board layout should yield very good stability and load
transient performance.
As the value of C
PUMP
controls the amount of output ripple,
the value of C
IN
controls the amount of ripple present at
the input pin (V
IN1
). The input current to the charge pump
will be relatively constant during the input charging phase
or the output charging phase but will drop to zero during
the nonoverlap times. Since the nonoverlap time is small
(~25ns), these missing notches will result in only a small
perturbation on the input power supply line. Note that a
higher ESR capacitor such as tantalum will have higher
input noise due to the voltage drop in the ESR. Therefore,
ceramic capacitors are again recommended for their
exceptional ESR performance.