Datasheet

LTC3851-1
20
38511fa
APPLICATIONS INFORMATION
The loop fi lter components, C
LP
and R
LP
, smooth out
the current pulses from the phase detector and provide
a stable input to the voltage-controlled oscillator. The
fi lter components C
LP
and R
LP
determine how fast the
loop acquires lock. Typically R
LP
is 1k to 10k and C
LP
is
2200pF to 0.01F.
When the external oscillator is active before the LTC3851
is enabled, the internal oscillator frequency will track the
external oscillator frequency as described in the preceding
paragraphs. In situations where the LTC3851 is enabled
before the external oscillator is active, a low free-running
oscillator frequency of approximately 50kHz will result. It is
possible to increase the free-running, pre-synchronization
frequency by adding a second resistor in parallel with
R
LP
and C
LP
. The second resistor will also cause a phase
difference between the internal and external oscillator
signals. The magnitude of the phase difference is inversely
proportional to the value of the second resistor.
The external clock (on MODE/PLLIN pin) input high
threshold is nominally 1.6V, while the input low thres hold
is nominally 1.2V.
Minimum On-Time Considerations
Minimum on-time t
ON(MIN)
is the smallest time duration that
the LTC3851-1 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that:
t
V
Vf
ON MIN
OUT
IN
()
()
<
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for the LTC3851-1 is approximately
90ns. However, as the peak sense voltage decreases the
minimum on-time gradually increases. This is of particu-
lar concern in forced continuous applications with low
ripple current at light loads. If the duty cycle drops below
the minimum on-time limit in this situation, a signifi cant
amount of cycle skipping can occur with correspondingly
larger current and voltage ripple.
Effi ciency Considerations
The percent effi ciency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the effi ciency and which change would
produce the most improvement. Percent effi ciency can
be expressed as:
%Effi ciency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3851-1 circuits: 1) IC V
IN
current, 2)
INTV
CC
regulator current, 3) I
2
R losses, 4) topside MOSFET
transition losses.
1. The V
IN
current is the DC supply current given in the
Electrical Characteristics table, which excludes MOSFET
driver current. V
IN
current typi cally results in a small
(<0.1%) loss.
2.
INTV
CC
current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTV
CC
to ground. The resulting dQ/dt is a cur rent
out of INTV
CC
that is typically much larger than the
control circuit current. In continuous mode, I
GATECHG
= f(Q
T
+ Q
B
), where Q
T
and Q
B
are the gate charges of
the topside and bottom side MOSFETs.
3. I
2
R losses are predicted from the DC resistances of
the fuse (if used), MOSFET, inductor and current sense
resistor. In continuous mode, the average output current
fl ows through L and R
SENSE
, but is “chopped” between
the topside MOSFET and the synchronous MOSFET.
If the two MOSFETs have approximately the same
R
DS(ON)
, then the resistance of one MOSFET can simply
be summed with the resistances of L and R
SENSE
to
obtain I
2
R losses. For example, if each R
DS(ON)
= 10mΩ,