Datasheet

LTC3851A
22
3851afa
stability of the closed-loop system and will demonstrate
the actual overall supply performance.
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
OUT
, causing a rapid drop in V
OUT
. No regulator can
alter its delivery of current quickly enough to prevent this
sudden step change in output voltage if the load switch
resistance is low and it is driven quickly. If the ratio of
C
LOAD
to C
OUT
is greater than 1:50, the switch rise time
should be controlled so that the load rise time is limited
to approximately 25 • C
LOAD
. Thus a 10μF capacitor would
require a 250μs rise time, limiting the charging current
to about 200mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3851A. These items are also illustrated graphically
in the layout diagram of Figure 9. Check the following in
your layout:
1. Are the board signal and power grounds segregated?
The LTC3851A GND pin should tie to the ground plane
close to the input capacitor(s). The low current or signal
ground lines should make a single point tie directly to
the GND pin. The synchronous MOSFET source pins
should connect to the input capacitor(s) ground.
applicaTions inForMaTion
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
MODE/PLLIN
FREQ/PLLFLTR
RUN
TK/SS
I
TH
V
FB
SENSE
–
SENSE
+
SW
TG
BOOST
V
IN
INTV
CC
BG
GND
I
LIM
LTC3851A
47pF
C
C
C
SS
0.1µF
C
C2
R
FREQ
R
C
1000pF
+
C
OUT
R1
R2
C
B
D
B
R
SENSE
M2
4.7µF
M1
+
C
IN
+
–
–
L1
V
IN
+
V
OUT
3851A F09
10Ω
10Ω
+
Figure 9. LTC3851A Layout Diagram