Datasheet

LTC3850/LTC3850-1
29
38501fc
The Coiltronics (Cooper) HCP0703-2R2 (20mΩ DCR
MAX
at 20°C) and HCP0703-3R3 (30mΩ DCR
MAX
at 20°C) are
chosen. At 100°C, the estimated maximum DCR values are
26.4mΩ and 39.6mΩ. The divider ratios are:
R
D
=
R
SENSE(EQUIV)
DCR
MAX
at T
L(MAX)
=
7mΩ
26.4mΩ
= 0.26;
and
7mΩ
39.6mΩ
≅ 0.18
For each channel, 0.1µF is selected for C1.
R1||R2=
L
(DCR
MAX
at 20°C)• C1
=
2.2µH
20mΩ • 0.1µF
=1.1k ; and
3.3µH
30mΩ • 0.1µF
= 1.1k
For channel 1, the DCR
SENSE
filter/divider values are:
R1=
R1||R2
R
D
=
1.1k
0.18
≅ 6.19k;
R2=
R1• R
D
1−R
D
=
6.19k • 0.18
1− 0.18
≅1.33k
The power loss in R1 at the maximum input voltage is:
P
LOSS
R1=
(V
IN(MAX)
− V
OUT
)• V
OUT
R1
=
(20V − 3.3V)• 3.3V
6.19k
= 9mW
The respective values for Channel 2 are R1 = 4.12k, R2 =
1.5k; and P
LOSS
R1 = 8mW.
Burst Mode operation is chosen for high light load efficiency
(Figure 15) by floating the MODE/PLLIN pin. Power loss
due to the DCR sensing network is slightly higher at light
loads than would have been the case with a suitable sense
resistor (7mΩ). At heavier loads, DCR sensing provides
higher efficiency.
The power dissipation on the topside MOSFET can be easily
estimated. Choosing a Siliconix Si4816BDY dual MOSFET
results in: R
DS(ON)
= 0.023Ω/0.016Ω, C
MILLER
@ 100pF.
At maximum input voltage with T(estimated) = 50°C:
P
MAIN
=
3.3V
20V
5
( )
2
1+(0.005)(50°C – 25°C)
[ ]
•
0.023Ω
( )
+ 20V
( )
2
5A
2






2Ω
( )
100pF
( )
•
1
5 – 2.3
+
1
2.3






500kHz
( )
=186mW
A short-circuit to ground will result in a folded back cur-
rent of:
I
SC
=
1/ 3
( )
50mV
0.007Ω
–
1
2
90ns(20V)
3.3µH






= 2.1A
with a typical value of R
DS(ON)
and d = (0.005/°C)(20)
= 0.1. The resulting power dissipated in the bottom
MOSFET is:
P
SYNC
=
20V – 3.3V
20V
2.1A
( )
2
1.125
( )
0.016Ω
( )
=
66mW
which is less than under full-load conditions.
C
IN
is chosen for an RMS current rating of at least 2A at
temperature assuming only channel 1 or 2 is on. C
OUT
is
chosen with an ESR of 0.02Ω for low output ripple. The
output ripple in continuous mode will be highest at the
maximum input voltage. The output voltage ripple due to
ESR is approximately:
V
ORIPPLE
= R
ESR
(∆I
L
) = 0.02Ω(1.5A) = 30mV
P–P
Figure 15. Design Example Efficiency vs Load
APPLICATIONS INFORMATION
LOAD CURRENT (mA)
0.01
70
EFFICIENCY (%)
POWER LOSS (mW)
80
90
0.1 1 10
60
50
40
100
0.1
1
0.01
10
38501 F15
EFFICIENCY
POWER LOSS
DCR
7mΩ
DCR