Datasheet

LTC3839
4
3839fa
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The junction temperature (T
J
, in °C) is calculated from the ambient
temperature (T
A
, in °C) and power dissipation (P
D
, in Watts) according to
the formula:
T
J
= T
A
+ (P
D
• θ
JA
)
where θ
JA
(in °C/W) is the package thermal impedance.
Note 3: The LTC3839 is tested under pulsed loading conditions such that
T
J
≈ T
A
. The LTC3839E is guaranteed to meet specifications over the 0°C
to 85°C operating junction temperature range. Specifications over the
–40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3839I is guaranteed to meet specifications over the –40°C to
125°C operating junction temperature range . Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors.
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 15V unless otherwise noted (Note 3).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Internal V
CC
Regulator
V
DRVCC1
Internally Regulated DRV
CC1
Voltage 6V < V
IN
< 38V 5.0 5.3 5.6 V
DRV
CC1
Load Regulation I
DRVCC1
= 0mA to –100mA –1.5 –3.5 %
V
EXTVCC
EXTV
CC
Switchover Voltage EXTV
CC
Rising 4.4 4.6 4.8 V
EXTV
CC
Switchover Hysteresis EXTV
CC
Falling from Switchover Voltage 200 mV
EXTV
CC
to DRV
CC2
Voltage Drop V
EXTVCC
= 5V, I
DRVCC2
= –100mA 200 mV
PGood Output
OV PGOOD Overvoltage Threshold V
OUT
Rising, with Respect to Regulated Voltage 5 7.5 10 %
UV PGOOD Undervoltage Threshold V
OUT
Falling, with Respect to Regulated Voltage –5 –7.5 –10 %
PGOOD Threshold Hysteresis V
OUT
Returning to Reference Voltage 2 %
V
PGOOD(L)
PGOOD Low Voltage I
PGOOD
= 2mA 0.1 0.3 V
t
D(PGOOD)
Delay from V
FB
Fault (OV/UV) to PGOOD
Falling
Delay from V
FB
Good to PGOOD Rising
50
20
µs
µs
Note 4: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 5: The LTC3839 is tested in a feedback loop that adjusts the
differential feedback voltage (V
OUTSENSE
+
– V
OUTSENSE
–
) to
achieve specified error amplifier output voltages (ITH).
Note 6: Delay times are measured with top gate (TG) and bottom gate
(BG) driving minimum load, and using 50% levels.
Note 7: In order to simplify the total system error computation, the
regulated voltage is defined in one combined specification which includes
the effects of line, load and common mode variation. The combined
regulated voltage specification is tested by independently varying line,
load, and common mode, which by design do not significantly affect one
another. For any combination of line, load, and common mode variation,
the regulated voltage should be within the limits specified that are tested in
production to the following conditions:
•
Line: V
IN
= 4.5V to 38V, ITH = 1.2V, V
OUTSENSE
–
= 0V
•
Load: V
IN
= 15V, ITH = 0.5V to 1.9V, V
OUTSENSE
–
= 0V
•
Common mode: V
IN
= 15V, ITH = 1.2V, to V
OUTSENSE
–
= ±500mV