Datasheet

LTC3839
22
3839fa
APPLICATIONS INFORMATION
To maintain a good signal-to-noise ratio for the current
sense signal, start with a ∆V
SENSE
of 10mV. For a DCR
sensing application, the actual ripple voltage will be de-
termined by:
ΔV
SENSE
=
V
IN
–V
OUT
R1• C1
•
V
OUT
V
IN
•f
Power MOSFET Selection
Two external N-channel power MOSFETs must be selected
for each channel of the LTC3839 controller: one for the
top (main) switch and one for the bottom (synchronous)
switch. The gate drive levels are set by the DRV
CC
voltage.
This voltage is typically 5.3V. Pay close attention to the
BV
DSS
specification for the MOSFETs as well; most of the
logic-level MOSFETs are limited to 30V or less.
Selection criteria for the power MOSFETs include the on-
resistance, R
DS(ON)
, Miller capacitance, C
MILLER
, input
voltage and maximum output current. Miller capacitance,
C
MILLER
, can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data sheet.
C
MILLER
is equal to the increase in gate charge along the
horizontal axis while the curve is approximately flat (or
the parameter Q
GD
if specified on a manufacturer’s data
sheet), divided by the specified V
DS
test voltage:
C
MILLER
≅
Q
GD
V
DS(TEST)
When the IC is operating in continuous mode, the duty
cycles for the top and bottom MOSFETs are given by:
D
TOP
=
V
OUT
V
IN
D
BOT
=1–
V
OUT
V
IN
The MOSFET power dissipations at maximum output
current are given by:
P
TOP
=D
TOP
•I
OUT(MAX)
2
•R
DS(ON)(MAX)
1+δ
()
+ V
IN
2
•
I
OUT(MAX)
2
⎛
⎝
⎜
⎞
⎠
⎟
•C
MILLER
R
TG(UP)
V
DRVCC
–V
MILLER
+
R
TG(DOWN)
V
MILLER
⎡
⎣
⎢
⎤
⎦
⎥
•f
P
BOT
= D
BOT
• I
OUT(MAX)
2
• R
DS(ON)(MAX)
• (1 + δ )
where δ is the temperature dependency of R
DS(ON)
, R
TG(UP)
is the TG pull-up resistance, and R
TG(DOWN)
is the TG pull-
down resistance. V
MILLER
is the Miller effect V
GS
voltage
and is taken graphically from the MOSFET ’s data sheet.
Both MOSFETs have I
2
R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V
IN
< 20V,
the high current efficiency generally improves with larger
MOSFETs, while for V
IN
> 20V, the transition losses rapidly
increase to the point that the use of a higher R
DS(ON)
device
with lower C
MILLER
actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
short-circuit when the synchronous switch is on close to
100% of the period.
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized R
DS(ON)
vs temperature curve in the
power MOSFET data sheet. For low voltage MOSFETs,
0.5% per degree (°C) can be used to estimate δ as an
approximation of percentage change of R
DS(ON)
:
δ = 0.005/°C • (T
J
– T
A
)
where T
J
is estimated junction temperature of the MOSFET
and T
A
is ambient temperature.
C
IN
Selection
In continuous mode, the source current of the top N-
channel MOSFET is a square wave of duty cycle V
OUT
/
V
IN
. To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The worst-case RMS current occurs by assuming
a single-phase application. The maximum RMS capacitor
current is given by:
I
RMS
≅I
OUT(MAX)
•
V
OUT
V
IN
•
V
IN
V
OUT
–1
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT(MAX)
/2. This simple worst-case condition
is commonly used for design because even significant
deviations do not offer much relief. Note that capacitor
manufacturers’ ripple current ratings are often based on
only 2000 hours of life. This makes it advisable to further
derate the capacitor or to choose a capacitor rated at a