Datasheet

LTC3839
15
3839fa
Multichip Operation
The PHASMD pin determines the relative phases between
the internal reference clock signals for the two channels
as well as the CLKOUT signal, as shown in Table 1. The
phases tabulated are relative to zero degree (0°) being
defined as the rising edge of the internal reference clock
signal of channel 1. The CLKOUT signal can be used to
synchronize additional power stages in a multiphase power
supply solution feeding either a single high current output,
or separate outputs.
The system can be configured for up to 12-phase opera-
tion with a multichip solution. Typical configurations are
shown in Table 2 to interleave the phases of the channels.
Table 1
PHASMD SGND FLOAT INTV
CC
Channel 1 0° 0° 0°
Channel 2 180° 180° 240°
CLKOUT 60° 90° 120°
Table 2
NUMBER OF
PHASES
NUMBER OF
LTC3839
PIN CONNECTIONS
[PIN NAME (CHIP NUMBER)]
2 1 PHASMD(1) = FLOAT or SGND
3 2, or 1 +
LTC3833
PHASMD(1) = INTV
CC
MODE/PLLIN(2) = CLKOUT(1)
4 2 PHASMD(1) = FLOAT
PHASMD(2) = FLOAT or SGND
MODE/PLLIN(2) = CLKOUT(1)
6 3 PHASMD(1) = SGND
PHASMD(2) = SGND
MODE/PLLIN(2) = CLKOUT(1)
PHASMD(3) = FLOAT or SGND
MODE/PLLIN(3) = CLKOUT(2)
12 6 PHASMD(1) = SGND
PHASMD(2) = SGND
MODE/PLLIN(2) = CLKOUT(1)
PHASMD(3) = FLOAT
MODE/PLLIN(3) = CLKOUT(2)
PHASMD(4) = SGND
MODE/PLLIN(4) = CLKOUT(3)
PHASMD(5) = SGND
MODE/PLLIN(5) = CLKOUT(4)
PHASMD(6) = FLOAT or SGND
MODE/PLLIN(6) = CLKOUT(5)
To make a single-output converter of three or more phases,
additional LTC3839 or LTC3833 chips can be used.
• Tie the ITH pin to the ITH pin of the first chip
• Tie the RUN pin to the RUN pin of the first chip
• Tie the V
OUTSENSE
+
pin to the V
OUTSENSE
+
pin of the first
chip
• Tie the V
OUTSENSE
–
pin to the V
OUTSENSE
–
pin of the first
chip
• Tie the TRACK/SS pin to the TRACK/SS pin of the first
chip
OPERATION
(Refer to Functional Diagram)