Datasheet

LTC3839
10
3839fa
PGOOD (Pin 13): Power Good Indicator Output. This
open-drain logic output is pulled to ground when the
output voltage goes out of a ±7.5% window around the
regulation point, after a 50µs power-bad-masking delay.
Returning to the regulation point, there is a 20µs delay to
power good, and a hysteresis of around 2% on both sides
of the voltage window.
BOOST1, BOOST2 (Pin 14, Pin 27): Boosted Floating
Supplies for Top MOSFET Drivers. The (+) terminal of the
bootstrap capacitor, C
B
, connects to this pin. The BOOST
pins swing by a V
IN
between a diode drop below DRV
CC
,
or (DRV
CC
– V
D
) and (V
IN
+ DRV
CC
– V
D
).
TG1, TG2 (Pin 15, Pin 26): Top Gate Driver Outputs. The
TG pins drive the gates of the top N-channel power MOSFET
with a voltage swing of V
DRVCC
between SW and BOOST.
SW1, SW2 (Pin 16, Pin 25): Switch Node Connection to
Inductors. Voltage swings are from a diode voltage below
ground to V
IN
. The (–) terminal of the bootstrap capacitor,
C
B
, connects to this node.
BG1, BG2 (Pin 17, Pin 24): Bottom Gate Driver Outputs.
The BG pins drive the gates of the bottom N-channel power
MOSFET between PGND and DRV
CC
.
DRV
CC1
, DRV
CC2
(Pin 18, Pin 23): Supplies of Bottom
Gate Drivers. DRV
CC1
is also the output of an internal 5.3V
regulator. DRV
CC2
is also the output of the EXTV
CC
switch.
Normally the two DRV
CC
pins are shorted together on the
PCB, and decoupled to PGND with a minimum of 4.7µF
ceramic capacitor, C
DRVCC
.
V
IN
(Pin 19): Input Voltage Supply. The supply voltage
can range from 4.5V to 38V. For increased noise immunity
decouple this pin to SGND with an RC filter. Voltage at this
pin is also used to adjust top gate on-time, therefore it
is recommended to tie this pin to the main power input
supply through an RC filter.
PGND (Pin 20, Exposed Pad Pin 33): Power Ground.
Connect this pin as close as practical to the source of
the bottom N-channel power MOSFET, the (–) terminal of
C
DRVCC
and the (–) terminal of C
IN
. Connect the exposed
pad and PGND pin to SGND pin using a single PCB trace
under the IC. The exposed pad must be soldered to the
circuit board ground for electrical connection and rated
thermal performance.
INTV
CC
(Pin 21): Supply Input for Internal Circuitry (Not
Including Gate Drivers). Normally powered from the DRV
CC
pins through a decoupling RC filter to SGND (typically
2 and 1µF).
EXTV
CC
(Pin 22): External Power Input. When EXTV
CC
exceeds the switchover voltage (typically 4.6V), an internal
switch connects this pin to DRV
CC2
and shuts down the
internal regulator so that INTV
CC
and gate drivers draw
power from EXTV
CC
. The V
IN
pin still needs to be powered
up but draws minimum current.
RUN (Pin 28): Run Control Inputs. An internal propor-
tional-to-absolute-temperature (PTAT) pull-up current
source (~2.5µA at 25°C) is constantly connected to this
pin. Taking the RUN pin below a threshold voltage (~0.8V
at 25°C) shuts down all bias of INTV
CC
and DRV
CC
and
places the LTC3839 into micropower shutdown mode.
Allowing the RUN pin to rise above this threshold would
turn on the internal bias supply and the circuitry. When
the RUN pin rises above 1.2V, both channels’ TG and BG
drivers are turned on and an additional 10µA temperature-
independent pull-up current is connected internally to the
RUN pin. The RUN pin can sink up to 100µA, or be forced
no higher than 6V.
V
RNG
(Pin 32): Current Sense Voltage Range Input. When
programmed between 0.6V and 2V, the voltage applied to
V
RNG
is twenty times (20×) the maximum sense voltage
between SENSE1,2
+
and SENSE1,2
–
, i.e., for either chan-
nel, (V
SENSE
+
– V
SENSE
–
) = 0.05 • V
RNG
. If a V
RNG
is tied
to SGND, the channel operates with a maximum sense
voltage of 30mV, equivalent to a V
RNG
of 0.6V; If tied to
INTV
CC
, a maximum sense voltage of 50mV, equivalent
to a V
RNG
of 1V.
PIN FUNCTIONS