Datasheet

LTC3838
29
3838fa
Figure 8. Setup for V
IN
≤ 5.3V
DRV
CC2
LTC3838
DRV
CC1
C
DRVCC
R
DRVCC
3838 F08
V
IN
C
IN
APPLICATIONS INFORMATION
For applications where the main input power never exceeds
5.3V, tie the DRV
CC1
and DRV
CC2
pins to the V
IN
input
through a small resistor, (such as 1 to 2) as shown
in Figure 8 to minimize the voltage drop caused by the
gate charge current. This will override the LDO and will
prevent DRV
CC
from dropping too low due to the dropout
voltage. Make sure the DRV
CC
voltage exceeds the R
DS(ON)
test voltage for the external MOSFET which is typically at
4.5V for logic-level devices.
Generally for V
IN
> 6V, a UVLO can be set through monitoring
the V
IN
supply by using external voltage dividers at the RUN
pins from V
IN
to SGND. To design the voltage divider, note
that both RUN pins have two levels of threshold voltages.
The precision gate-drive-enable threshold voltage of 1.2V
can be used to set a V
IN
to turn on a channel’s switching.
If resistor dividers are used on both RUN pins, when V
IN
is low enough and both RUN pins are pulled below the
~0.8V threshold, the part will shut down all bias of INTV
CC
and DRV
CC
and be put in micropower shutdown mode.
The RUN pins’ bias currents depend on the RUN voltages.
The bias current changes should be taken into account
when designing the external voltage divider UVLO circuit.
An internal proportional-to-absolute-temperature (PTAT)
pull-up current source (~1.2µA at 25°C) is constantly con-
nected to this pin. When a RUN pin rises above 1.2V, the
corresponding channel’s TG and BG drives are turned on
and an additional 5µA temperature-independent pull-up
current is connected internally to the RUN pin. Pulling the
RUN pin to fall below 1.2V by more than an 80mV hyster-
esis turns off TG and BG of the corresponding channel,
and the additional 5µA pull-up current is disconnected.
As voltage on a RUN pin increases, typically beyond 3V,
its bias current will start to reverse direction and flow into
the RUN pin. Keep in mind that neither of the RUN pins
can sink more than 50µA; Even if a RUN pin may slightly
exceed 6V when sinking 50µA, a RUN pin should never
be forced to higher than 6V by a low impedance voltage
source to prevent faulty conditions.
Soft-Start and Tracking
The LTC3838 has the ability to either soft-start by itself
with a capacitor or track the output of another channel or
an external supply. Note that the soft-start and tracking
features are achieved not by limiting the maximum output
current of the controller, but by controlling the output ramp
voltage according to the ramp rate on the TRACK/SS pin.
Input Undervoltage Lockout (UVLO)
The LTC3838 has two functions that help protect the con-
troller in case of input undervoltage conditions. An internal
UVLO comparator constantly monitors the INTV
CC
and
DRV
CC
voltages to ensure that adequate voltages are pres-
ent. The comparator enables internal UVLO signal, which
locks out the switching action of both channels, until the
INTV
CC
and DR
VCC1,2
pins are all above their respective
UVLO thresholds. The rising threshold (to release UVLO)
of the INTV
CC
is typically 4.2V, with 0.5V falling hysteresis
(to re-enable UVLO). The UVLO thresholds for DR
VCC1,2
are
lower than that of INTV
CC
but higher than typical threshold
voltages of power MOSFETs, to prevent them from turning
on without sufficient gate drive voltages.