Datasheet

LTC3838
17
3838fa
The system can be configured for up to 12-phase opera-
tion with a multichip solution. Typical configurations are
shown in Table 2 to interleave the phases of the channels.
Table 1
PHASMD SGND FLOAT INTV
CC
Channel 1 0° 0° 0°
Channel 2 180° 180° 240°
CLKOUT 60° 90° 120°
Table 2
NUMBER OF
PHASES
NUMBER OF
LTC3838
PIN CONNECTIONS
[PIN NAME (CHIP NUMBER)]
2 1 PHASMD(1) = FLOAT or SGND
3 2, or 1 +
LTC3833
PHASMD(1) = INTV
CC
MODE/PLLIN(2) = CLKOUT(1)
4 2 PHASMD(1) = FLOAT
PHASMD(2) = FLOAT or SGND
MODE/PLLIN(2) = CLKOUT(1)
6 3 PHASMD(1) = SGND
PHASMD(2) = SGND
MODE/PLLIN(2) = CLKOUT(1)
PHASMD(3) = FLOAT or SGND
MODE/PLLIN(3) = CLKOUT(2)
12 6 PHASMD(1) = SGND
PHASMD(2) = SGND
MODE/PLLIN(2) = CLKOUT(1)
PHASMD(3) = FLOAT
MODE/PLLIN(3) = CLKOUT(2)
PHASMD(4) = SGND
MODE/PLLIN(4) = CLKOUT(3)
PHASMD(5) = SGND
MODE/PLLIN(5) = CLKOUT(4)
PHASMD(6) = FLOAT or SGND
MODE/PLLIN(6) = CLKOUT(5)
Single-Output PolyPhase Configurations
To use LTC3838 for a 2-phase single output step-down
controller: Tie the V
FB2
pin to INTV
CC
, which will disable
Channel 2’s error amplifier and internally connect ITH2 to
ITH1. Tie the compensation R-C components to the ITH1
pin. The ITH2 pin can be either left open or shorted to ITH1
externally. The TRACK/SS2 and PGOOD2 pins become
defunct and can be left open. Note that the RUN1, RUN2,
DTR1, DTR2, VRNG1 and VRNG2 pins still function for
the two channels individually, therefore should be shorted
externally for single-output applications. Set PHASMD
to SGND or FLOAT so that the two channels are 180°
out-of-phase. Efficiency losses may be substantially
reduced because the peak current drawn from the input
capacitor is effectively divided by the number of phases
used and power loss is proportional to the RMS current
squared. A 2-phase implementation can reduce the input
path power loss by up to 75%.
To make a single-output converter of three or more phases,
additional LTC3838 or LTC3833 chips can be used. The first
chip should be tied the same way as the 2-phase above. If
only one more channel of an additional LTC3838 is needed,
use Channel 1 for the additional phase:
• Tie the ITH1 pin to the ITH1 pin of the first chip
• Tie the RUN1 pin to the RUN pins of the first chip
• Tie the V
OUTSENSE1
+
pin to the V
OUTSENSE1
+
pin of the
first chip
• Tie the V
OUTSENSE1
–
pin to the V
OUTSENSE1
–
pin of the
first chip
• Tie the TRACK/SS1 pin to the TRACK/SS1 pin of the
first chip
If both channels are needed, the additional LTC3838 chip
should be tied the same way as the first LTC3838 chip to
disable the second channel’s EA:
• Tie the V
FB2
pin to the chip’s own INTV
CC
• Tie the ITH1 pin to the ITH1 pin of the first chip
• Tie the RUN pins to the RUN pins of the first chip
• Tie the V
OUTSENSE1
+
pin to the V
OUTSENSE1
+
pin of the
first chip
• Tie the V
OUTSENSE1
–
pin to the V
OUTSENSE1
–
pin of the
first chip
• Tie the TRACK/SS1 pin to the TRACK/SS1 pin of the
first chip
OPERATION
(Refer to Functional Diagram)