Datasheet

LTC3838
13
3838fa
FUNCTIONAL DIAGRAM
–
+
TG
BOOST
TG
DRV
V
IN
UVLO
~0.8V
BG
PGND
SENSE
+
SENSE
–
TRACK/SS
BG DRV
EN_DRV
5µA
RUN
SW
EXTV
CC
INTV
CC
DRV
CC2
DRV
CC1
~4.6V
D
B
DRV
CC
C
B
C
INTVCC
C
DRVCC
C
OUT
C
SS
3838 FD
R
FB2
R
FB1
V
OUT
V
IN
M
T
M
B
L
R
SENSE
–
+
–
+
4.2V
–
+
1.2V
250k
START
STOP
250k
SENSE
–
V
IN
–
+
–
+
–
+
1-2µA
PTAT
LOGIC
CONTROL
MODE/PLLIN
ONE-SHOT
TIMER
ON-TIME
ADJUST
I
CMP
I
REV
FORCED
CONTINUOUS
MODE
PHASE
DETECTOR
CLK1
CLK2
TO CHANNEL 2
MODE/CLK
DETECT
CLOCK PLL/
GENERATOR
DUPLICATE DASHED
LINE BOX FOR
CHANNEL 2
IN
LDOEN
OUT SD
RT
R
T
CLKOUT
PGOOD
INTV
CC
R
PGD
g
m
g
m
EA
0.6V
+
+
–
1µA
UV
–
+
–
+
DIFFAMP
(A = 1)
0.645V
V
RNG
I
TH
DTR
1/2 INTV
CC
TO LOGIC
CONTROL
LOAD
RELEASE
DETECTION
0.555V
–
+
OV
DELAY
C
ITH2
C
ITH1
INTV
CC
V
OUTSENSE1
+
V
OUTSENSE1
–
V
FB2
SGND
CHANNEL 2 ONLY
R
ITH2
INTV
CC
R
ITH1
INTV
CC