Datasheet

LTC3838
10
3838fa
PIN FUNCTIONS
(QFN/TSSOP)
PHASMD (Pin 4/Pin 8): Phase Selector Input. This pin
determines the relative phases of channels and the
CLKOUT signal. With zero phase being defined as the
rising edge of TG1: Pulling this pin to SGND locks TG2 to
180°, and CLKOUT to 60°. Connecting this pin to INTV
CC
locks TG2 to 240° and CLKOUT to 120°. Floating this pin
locks TG2 to 180° and CLKOUT to 90°.
MODE/PLLIN (Pin 5/Pin 9): Operation Mode Selection
or External Clock Synchronization Input. When this pin
is tied to INTV
CC
, forced continuous mode operation is
selected. Tying this pin to SGND allows discontinuous
mode operation. When an external clock is applied at this
pin, both channels operate in forced continuous mode and
synchronize to the external clock.
CLKOUT (Pin 6/Pin 10): Clock Output of Internal Clock
Generator. Its output level swings between INTV
CC
and
SGND. If clock input is present at the MODE/PLLIN pin, it
will be synchronized to the input clock, with phase set by
the PHASMD pin. If no clock is present at MODE/PLLIN, its
frequency will be set by the RT pin. To synchronize other
controllers, it can be connected to their MODE/PLLIN pins.
SGND (Pin 7/Pin 11): Signal Ground. All small-signal analog
and compensation components should be connected to
this ground. Connect SGND to the exposed pad and PGND
pin using a single PCB trace.
RT (Pin 8/Pin 12): Clock Generator Frequency Program-
ming Pin. Connect an external resistor from RT to SGND
to program the switching frequency between 200kHz and
2MHz. An external clock applied to MODE/PLLIN should
be within ±30% of this programmed frequency to ensure
frequency lock. When the RT pin is floating, the frequency
is internally set to be slightly under 200kHz.
V
RNG1
, V
RNG2
(Pins 9, 3/Pins 13, 7): Current Sense Volt-
age Range Inputs. When programmed between 0.6V and
2V, the voltage applied to V
RNG1,2
is twenty times (20×)
the maximum sense voltage between SENSE1,2
+
and
SENSE1,2
–
, i.e., for either channel, (V
SENSE
+
– V
SENSE
–
) =
0.05 • V
RNG
. If a V
RNG
is tied to SGND, the channel oper-
ates with a maximum sense voltage of 30mV, equivalent
to a V
RNG
of 0.6V; If tied to INTV
CC
, a maximum sense
voltage of 50mV, equivalent to a V
RNG
of 1V.
ITH1, ITH2 (Pins 10, 2/Pins 14, 6): Current Control
Threshold. This pin is the output of the error amplifier and
the switching regulator’s compensation point. The current
comparator threshold increases with this control voltage.
The voltage ranges from 0V to 2.4V, with 0.8V correspond-
ing to zero sense voltage (zero inductor valley current).
TRACK/SS1, TRACK/SS2 (Pins 11, 1/Pins 15, 5): External
Tracking and Soft-Start Input. The LTC3838 regulates the
feedback voltages (V
OUTSENSE1
+
– V
OUTSENSE1
–
) and V
FB2
to the smaller of 0.6V or the voltage on the TRACK/SS1,2
pins respectively. An internal 1µA temperature-independent
pull-up current source is connected to each TRACK/SS
pin. A capacitor to ground at this pin sets the ramp time
to the final regulated output voltage. Alternatively, another
voltage supply connected to this pin allows the output to
track the other supply during start-up.
V
OUTSENSE1
+
(Pin 12/Pin 16): Differential Output Sense
Amplifier (+) Input of Channel 1. Connect this pin to a
feedback resistor divider between the positive and negative
output capacitor terminals of V
OUT1
. In nominal operation
the LTC3838 will attempt to regulate the differential output
voltage V
OUT1
to 0.6V divided by the feedback resistor
divider ratio.