LTC3838 Dual, Fast, Accurate StepDown DC/DC Controller with Differential Output Sensing DESCRIPTION FEATURES n n n n n n n n n n n n n Wide VIN Range: 4.5V to 38V, VOUT: 0.6V to 5.5V ±0.
LTC3838 ABSOLUTE MAXIMUM RATINGS (Note 1) VIN Voltage ................................................. –0.3V to 40V BOOST1, BOOST2 Voltages ....................... –0.3V to 46V SW1, SW2 Voltages ...................................... –5V to 40V INTVCC, DRVCC1, DRVCC2, EXTVCC, PGOOD1, PGOOD2, RUN1, RUN2, (BOOST1-SW1), (BOOST2-SW2), MODE/PLLIN Voltages ...... –0.3V to 6V VOUTSENSE1+, VOUTSENSE1–, SENSE1+, SENSE2+, SENSE1–, SENSE2– Voltages ....................... –0.
LTC3838 ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3838EUHF#PBF LTC3838EUHF#TRPBF 3838 38-Lead (5mm × 7mm) Plastic QFN –40°C to 125°C LTC3838IUHF#PBF LTC3838IUHF#TRPBF 3838 38-Lead (5mm × 7mm) Plastic QFN –40°C to 125°C LTC3838EFE#PBF LTC3838EFE#TRPBF LTC3838FE 38-Lead Plastic TSSOP –40°C to 125°C LTC3838IFE#PBF LTC3838IFE#TRPBF LTC3838FE 38-Lead Plastic TSSOP –40°C to 125°C Consult LTC Marketing for parts specified with w
LTC3838 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted (Note 3). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VSENSE(MAX)1,2 Maximum Valley Current Sense Threshold (VSENSE1,2+ – VSENSE1,2–) VRNG = 2V, VFB = 0.57V, VSENSE– = 2.5V VRNG = 0V, VFB = 0.57V, VSENSE– = 2.5V VRNG = INTVCC, VFB = 0.57V, VSENSE– = 2.
LTC3838 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted (Note 3). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Internally Regulated DRVCC1 Voltage 6V < VIN < 38V 5.0 5.3 5.6 V DRVCC1 Load Regulation IDRVCC1 = 0mA to –100mA –1.5 –3 % EXTVCC Switchover Voltage EXTVCC Rising 4.6 4.8 Internal VCC Regulator VDRVCC1 VEXTVCC 4.
LTC3838 TYPICAL PERFORMANCE CHARACTERISTICS Transient Response (Forced Continuous Mode) Load Step (Forced Continuous Mode) Load Release (Forced Continuous Mode) ILOAD 10A/DIV ILOAD 10A/DIV ILOAD 10A/DIV VOUT 50mV/DIV AC-COUPLED VOUT 50mV/DIV AC-COUPLED VOUT 50mV/DIV AC-COUPLED IL 10A/DIV IL 10A/DIV IL 10A/DIV 3838 G01 50μs/DIV LOAD TRANSIENT = 0A TO 15A TO 0A VIN = 12V VOUT = 1.2V FIGURE 17 CIRCUIT, CHANNEL 1, VRNG1 = SGND 3838 G02 5μs/DIV LOAD STEP = 0A TO 15A VIN = 12V VOUT = 1.
LTC3838 TYPICAL PERFORMANCE CHARACTERISTICS Soft Start-Up Into Pre-Biased Output Regular Soft Start-Up RUN1 5V/DIV RUN1 5V/DIV TRACK/SS1 200mV/DIV VOUT 500mV/DIV TRACK/SS1 200mV/DIV 3838 G09 CSS = 10nF 1ms/DIV VIN = 12V VOUT = 1.2V FORCED CONTINUOUS MODE FIGURE 17 CIRCUIT, CHANNEL 1, VRNG1 = SGND 3838 G10 CSS = 10nF 1ms/DIV VIN = 12V VOUT = 1.2V VOUT PRE-BIASED TO 0.
LTC3838 TYPICAL PERFORMANCE CHARACTERISTICS Output Regulation vs Input Voltage Output Regulation vs Load Current 0.2 0.2 0 –0.1 5 10 15 20 25 VIN (V) 30 35 0 –0.2 40 2 0 6 4 ILOAD (A) 8 0.2 0 –0.4 CHANNEL 1 CHANNEL 2 –0.6 –50 –25 10 Error Amplifier Transconductance vs Temperature 1.80 CLKOUT/Switching Frequency vs Temperature 2 2 1 1 1.60 NORMALIZED Δf (%) NORMALIZED Δf (%) 1.75 1.
LTC3838 TYPICAL PERFORMANCE CHARACTERISTICS FORCED CONTINUOUS MODE CURRENT SENSE VOLTAGE (mV) 100 80 60 40 20 0 –20 VRNG = 2V VRNG = 1V VRNG = 0.6V –40 –60 0 0.8 1.2 1.6 ITH VOLTAGE (V) 0.4 2 120 VRNG = 2V 100 80 60 VRNG = 1V 40 VRNG = 0.6V 20 0 –50 –25 2.4 0 25 50 75 100 125 150 TEMPERATURE (°C) RUN Pin Thresholds vs Temperature 0.8 0.6 3 RUN PIN BELOW 1.2V SWITCHING THRESHOLD 1.05 1.00 0.95 0.85 0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) 0 0.
LTC3838 PIN FUNCTIONS (QFN/TSSOP) PHASMD (Pin 4/Pin 8): Phase Selector Input. This pin determines the relative phases of channels and the CLKOUT signal. With zero phase being defined as the rising edge of TG1: Pulling this pin to SGND locks TG2 to 180°, and CLKOUT to 60°. Connecting this pin to INTVCC locks TG2 to 240° and CLKOUT to 120°. Floating this pin locks TG2 to 180° and CLKOUT to 90°. MODE/PLLIN (Pin 5/Pin 9): Operation Mode Selection or External Clock Synchronization Input.
LTC3838 PIN FUNCTIONS (QFN/TSSOP) VOUTSENSE1– (Pin 13/Pin 17): Differential Output Sense Amplifier (–) Input of Channel 1. Connect this pin to the negative terminal of the output load capacitor of VOUT1. SENSE1+, SENSE2+ (Pins 14, 37/Pins 18, 3): Differential Current Sense Comparator (+) Inputs. The ITH pin voltage and controlled offsets between the SENSE+ and SENSE– pins set the current trip threshold. The comparator can be used for RSENSE sensing or inductor DCR sensing.
LTC3838 PIN FUNCTIONS (QFN/TSSOP) SW1, SW2 (Pins 21, 30/Pins 25, 34): Switch Node Connection to Inductors. Voltage swings are from a diode voltage below ground to VIN. The (–) terminal of the bootstrap capacitor, CB, connects to this node. INTVCC (Pin 26/Pin 30): Supply Input for Internal Circuitry (Not Including Gate Drivers). Normally powered from the DRVCC pins through a decoupling RC filter to SGND (typically 2Ω and 1μF). BG1, BG2 (Pins 22, 29/Pins 26, 33): Bottom Gate Driver Outputs.
LTC3838 FUNCTIONAL DIAGRAM VIN VIN IN EN LDO OUT SD 1-2μA PTAT 5μA + UVLO 4.2V + 1.2V BOOST TG DRV – RUN MT L SW EN_DRV – CB DB TG RSENSE VOUT DRVCC ~0.8V EXTVCC + + – – LOGIC CONTROL SENSE– VIN 250k ~4.
LTC3838 OPERATION (Refer to Functional Diagram) Main Control Loop The LTC3838 is a controlled on-time, valley current mode step-down DC/DC dual controller with two channels operating out of phase. Each channel drives both main and synchronous N-channel MOSFETs. The two channels can be either configured to two independently regulated outputs, or combined into a single output. The top MOSFET is turned on for a time interval determined by a one-shot timer.
LTC3838 OPERATION (Refer to Functional Diagram) from VIN and can output 5.3V to DRVCC1. Alternatively, an internal EXTVCC switch (with on-resistance of around 2Ω) can short the EXTVCC pin to DRVCC2. If the EXTVCC pin is below the EXTVCC switchover voltage (typically 4.6V with 200mV hysteresis, see the Electrical Characteristics Table), then the internal 5.3V LDO is enabled.
LTC3838 OPERATION (Refer to Functional Diagram) If the MODE/PLLIN pin is left open or connected to signal ground, the channel will transition into discontinuous mode operation, where a current reversal comparator (IREV) shuts off the bottom MOSFET (MB) as the inductor current approaches zero, thus preventing negative inductor current and improving light-load efficiency. In this mode, both switches can remain off for extended periods of time.
LTC3838 OPERATION (Refer to Functional Diagram) The system can be configured for up to 12-phase operation with a multichip solution. Typical configurations are shown in Table 2 to interleave the phases of the channels. Table 1 PHASMD SGND FLOAT INTVCC Channel 1 0° 0° 0° Channel 2 180° 180° 240° CLKOUT 60° 90° 120° Table 2 NUMBER OF PHASES externally for single-output applications. Set PHASMD to SGND or FLOAT so that the two channels are 180° out-of-phase.
LTC3838 APPLICATIONS INFORMATION Once the required output voltage and operating frequency have been determined, external component selection is driven by load requirement, and begins with the selection of inductors and current sense method (either sense resistors RSENSE or inductor DCR sensing). Next, power MOSFETs are selected. Finally, input and output capacitors are selected.
LTC3838 APPLICATIONS INFORMATION CIN MT + – VIN POWER TRACE PARASITICS L LTC3838 VOUTSENSE1+ VOUTSENSE1– RFB2 ±VDROP(PWR) MB RFB1 COUT1 ILOAD COUT2 I LOAD GROUND TRACE PARASITICS ±VDROP(GND) OTHER CURRENTS FLOWING IN SHARED GROUND PLANE 3838 F02 Figure 2. Differential Output Sensing Used to Correct Line Loss Variations in a High Power Distributed System with a Shared Ground Plane enough so that it will not affect main loop compensation and transient behavior.
LTC3838 APPLICATIONS INFORMATION The inductor value has a direct effect on ripple current. The inductor ripple current ∆IL decreases with higher inductance or frequency and increases with higher VIN: ⎛V ⎞⎛ V ⎞ ΔIL = ⎜ OUT ⎟ ⎜ 1– OUT ⎟ ⎝ f •L ⎠ ⎝ VIN ⎠ Accepting larger values of ∆IL allows the use of low inductances, but results in higher output voltage ripple, higher ESR losses in the output capacitor, and greater core losses. A reasonable starting point for setting ripple current is ∆IL = 0.4 • IMAX.
LTC3838 APPLICATIONS INFORMATION RSENSE Inductor Current Sensing The LTC3838 can be configured to sense the inductor currents through either low value series current sensing resistors (RSENSE) or inductor DC resistance (DCR). The choice between the two current sensing schemes is largely a design trade-off between cost, power consumption and accuracy. DCR sensing is becoming popular because it saves expensive current sensing resistors and is more power efficient, especially in high current applications.
LTC3838 APPLICATIONS INFORMATION For example, Figure 4a illustrates the voltage waveform across a 2mΩ sense resistor with a 2010 footprint for a 1.2V/15A converter operating at 100% load. The waveform is the superposition of a purely resistive component and a purely inductive component. It was measured using two scope probes and waveform math to obtain a differential measurement.
LTC3838 APPLICATIONS INFORMATION < 10A, set RF to 10Ω and CF to 1000pF. This will provide a good starting point. The filter components need to be placed close to the IC. The positive and negative sense traces need to be routed as a differential pair and Kelvin (4-wire) connected to the sense resistor. DCR Inductor Current Sensing For applications requiring higher efficiency at high load currents, the LTC3838 is capable of sensing the voltage drop across the inductor DCR, as shown in Figure 5.
LTC3838 APPLICATIONS INFORMATION The maximum power loss in R1 is related to duty cycle, and will occur in continuous mode at the maximum input voltage: PLOSS (V (R1) = IN(MAX) – VOUT )• V OUT CMILLER ≅ R1 Ensure that R1 has a power rating higher than this value. If high efficiency is necessary at light loads, consider this power loss when deciding whether to use DCR sensing or RSENSE sensing.
LTC3838 APPLICATIONS INFORMATION The term (1 + δ) is generally given for a MOSFET in the form of a normalized RDS(ON) vs temperature curve in the power MOSFET data sheet. For low voltage MOSFETs, 0.5% per degree (°C) can be used to estimate δ as an approximation of percentage change of RDS(ON): δ = 0.005/°C • (TJ – TA) where TJ is estimated junction temperature of the MOSFET and TA is ambient temperature.
LTC3838 APPLICATIONS INFORMATION more attractive since it can provide a larger capacitance for more damping. An aluminum-electrolytic capacitor with a ripple current rating that is high enough to handle all of the ripple current by itself will be very large. But when in parallel with ceramics, an aluminum-electrolytic capacitor will take a much smaller portion of the RMS ripple current due to its high ESR.
LTC3838 APPLICATIONS INFORMATION COUT Selection The selection of output capacitance COUT is primarily determined by the effective series resistance, ESR, to minimize voltage ripple. The output voltage ripple ∆VOUT , in continuous mode is determined by: ⎛ ⎞ 1 ΔVOUT ≤ ΔIL ⎜ RESR + 8 • f • COUT ⎟⎠ ⎝ where f is operating frequency, and ∆IL is ripple current in the inductor. The output ripple is highest at maximum input voltage since ∆IL increases with input voltage.
LTC3838 APPLICATIONS INFORMATION and BOOST capacitor under all operating conditions. Variable frequency in response to load steps offers superior transient performance but requires higher instantaneous gate drive. Gate charge demands are greatest in high frequency low duty factor applications under high load steps and at start-up. DRVCC Regulator and EXTVCC Power The LTC3838 features a PMOS low dropout (LDO) linear regulator that supplies power to DRVCC from the VIN supply.
LTC3838 APPLICATIONS INFORMATION For applications where the main input power never exceeds 5.3V, tie the DRVCC1 and DRVCC2 pins to the VIN input through a small resistor, (such as 1Ω to 2Ω) as shown in Figure 8 to minimize the voltage drop caused by the gate charge current. This will override the LDO and will prevent DRVCC from dropping too low due to the dropout voltage. Make sure the DRVCC voltage exceeds the RDS(ON) test voltage for the external MOSFET which is typically at 4.5V for logic-level devices.
LTC3838 APPLICATIONS INFORMATION When a channel is configured to soft-start by itself, a capacitor should be connected to its TRACK/SS pin. TRACK/ SS is pulled low until the RUN pin voltage exceeds 1.2V and UVLO is released, at which point an internal current of 1μA charges the soft-start capacitor, CSS, connected to the TRACK/SS pin. Current-limit foldback is disabled during this phase to ensure smooth soft-start or tracking. The soft-start or tracking range is defined to be the voltage range from 0V to 0.
LTC3838 APPLICATIONS INFORMATION VOUT1 must be set higher than VOUT2. To implement the ratiometric tracking, the master channel’s feedback divider can be also used to provide TRACK/SS voltage for the slave channel, since the additional divider, if used, should be of the same ratio as the master channel’s feedback divider. So which mode should be programmed? While either mode satisfies most practical applications, some tradeoffs exist.
LTC3838 APPLICATIONS INFORMATION ILOAD CLOCK INPUT PHASE AND FREQUENCY LOCKED PHASE AND FREQUENCY LOCK LOST DUE TO FAST LOAD STEP FREQUENCY RESTORED QUICKLY PHASE LOCK RESUMED PHASE AND FREQUENCY LOCK LOST DUE TO FAST LOAD STEP FREQUENCY RESTORED QUICKLY SW VOUT 3838 F10 Figure 10. Phase and Frequency Locking Behavior During Transient Conditions mode at light load and switch into continuous conduction at the RT programmed frequency as load increases.
LTC3838 APPLICATIONS INFORMATION and/or programmed f = 2MHz (i.e., RT = 18k). In applications with different VIN, VOUT and/or f, the tON(MIN) that can be achieved will generally be larger. Also, to guarantee frequency and phase locking at light load, sufficient margin needs to be added to account for the dead times (tD(TG/BG) + tD(TG/BG) in the Electrical Characteristics).
LTC3838 APPLICATIONS INFORMATION If the maximum duty cycle is reached, due to a drooping input voltage for example, the output will drop out of regulation. The minimum input voltage to avoid dropout is: VIN(MIN) = VOUT DMAX At the onset of drop-out, there is a region of VIN of about 500mV that generates two discrete off-times, one being the minimum off time and the other being an off-time that is about 40ns to 60ns longer than the minimum off-time.
LTC3838 APPLICATIONS INFORMATION The regulator loop response can also be checked by looking at the load transient response. An output current pulse of 20% to 100% of full-load current having a rise time of 1μs to 10μs will produce VOUT and ITH voltage transient-response waveforms that can give a sense of the overall loop stability without breaking the feedback loop. For a detailed explanation of OPTI-LOOP compensation, refer to Application Note 76.
LTC3838 APPLICATIONS INFORMATION to the inductor current setpoint. A load transient will result in a quick change of this load current setpoint, i.e., a negative spike of the first derivative of the ITH voltage. The LTC3838 uses a detect transient (DTR) pin to monitor the first derivative of the ITH voltage, and detect the loadrelease transient. Referring to the Functional Diagram, the DTR pin is the input of a DTR comparator, and the internal reference voltage for the DTR comparator is half of INTVCC.
LTC3838 APPLICATIONS INFORMATION as long as the OV condition is not present. When inductor current drops to zero and starts to reverse, BG will turn back on in forced continuous mode (e.g., the MODE/ PLLIN pin tied to INTVCC, or an input clock is present), even if DTR is still below half INTVCC. This is to allow the inductor current to go negative to quickly pull down the VOUT overshoot. Of course, if the MODE/PLLIN pin is set to discontinuous mode (i.e.
LTC3838 APPLICATIONS INFORMATION 3. DRVCC current. This is the sum of the MOSFET driver and INTVCC control currents. The MOSFET driver currents result from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from DRVCC to ground. The resulting dQ/dt is a current out of DRVCC that is typically much larger than the controller IQ current.
LTC3838 APPLICATIONS INFORMATION VIN 4.5V TO 26V + CIN1 220μF CIN2 10μF w3 2.2Ω LTC3838 1μF VIN SENSE1– SENSE2– SENSE1+ SENSE2+ BOOST1 BOOST2 0.1μF 15k 0.1μF 0.1μF 0.1μF 3.57k L1 0.56μH VOUT1 1.2V 15A TG1 MT1 + MT2 DB2 SW1 L2 0.56μH VOUT2 1.5V 15A SW2 DRVCC1 INTVCC COUT2 330μF w2 3.57k TG2 DB1 2.2Ω COUT1 100μF w2 15k DRVCC2 EXTVCC COUT4 + 330μF w2 4.7μF 1μF BG1 MB1 BG2 MB2 COUT3 100μF w2 PGND 10k VOUTSENSE1+ 15k VFB2 10k 100k PGOOD1 0.
LTC3838 APPLICATIONS INFORMATION Set the inductor value to give 40% ripple current at maximum VIN using the adjusted operating frequency: 1.2V ⎛ ⎞ ⎛ 1.2V ⎞ L=⎜ 1– = 0.54µH ⎝ 350kHz • 40% • 15A ⎟⎠ ⎜⎝ 24V ⎟⎠ Select 0.56μH which is the nearest standard value. The resulting maximum ripple current is: ⎛ ⎞ ⎛ 1.2V ⎞ 1.2V 1– = 5.8A ΔIL = ⎜ ⎝ 350kHz • 0.56µH ⎟⎠ ⎜⎝ 24V ⎟⎠ Often in a high power application, DCR current sensing is preferred over RSENSE in order to maximize efficiency.
LTC3838 APPLICATIONS INFORMATION These numbers show that careful attention should be paid to proper heat sinking when operating at higher ambient temperatures. Select the CIN capacitors to give ample capacitance and RMS ripple current rating. Consider worst-case duty cycles per Figure 6: If operated at steady-state with SW nodes fully interleaved, the two channels would generate not more than 7.5A RMS at full load.
LTC3838 APPLICATIONS INFORMATION DTR2 SENSE2– SENSE2+ VFB2 RFB2(2) CSS2 RFB1(2) TRACK/SS2 RITH2(2) CITH1(2) RITH1(2) ITH2 CITH2(2) L2 VOUT2 DB2 DRVCC2 EXTVCC MT2 CITH2(1) MB2 RINTVCC CERAMIC CINTVCC COUT2 PGND CVIN VIN VRNG1 CDRVCC VIN RVIN PGND + + RT RSENSE2 + VRNG2 PHASMD MODE/PLLIN CLKOUT SGND RT CIN CERAMIC COUT1 DRVCC1 RITH1(1) DB1 ITH1 CITH1(1) TRACK/SS1 RFB2(1) CB2 TG2 SW2 BG2 INTVCC LOCALIZED SGND TRACE RITH2(1) RUN2 PGOOD2 BOOST2 CSS1 MT1 MB1 BG1 SW1 RSENS
LTC3838 APPLICATIONS INFORMATION SW2 L2 RSENSE2 VOUT2 COUT2 RL2 VIN RIN CIN SW1 L1 RSENSE1 VOUT1 COUT1 BOLD LINES INDICATE HIGH SWITCHING CURRENT. KEEP LINES TO A MINIMUM LENGTH. RL1 3838 F15 Figure 15. Branch Current Waveforms • The top N-channel MOSFETs of the two channels have to be located within a short distance from (preferably <1cm) each other with a common drain connection at CIN.
LTC3838 APPLICATIONS INFORMATION • The path formed by the top and bottom N-channel MOSFETs, and the CIN capacitors should have short leads and PCB trace. The (–) terminal of output capacitors should be connected close to the (–) terminal of CIN, but away from the loop described above.
LTC3838 APPLICATIONS INFORMATION from cycle to cycle in a well designed, low noise PCB implementation. Variation in the phase of SW node pulse can suggest noise pickup at the current or voltage sensing inputs or inadequate loop compensation. Overcompensation of the loop can be used to tame a poor PCB layout if regulator bandwidth optimization is not required.
LTC3838 TYPICAL APPLICATIONS VIN 4.5V TO 38V + CIN1 100μF CIN2 10μF w3 2.2Ω LTC3838 1μF VIN SENSE1– SENSE2– SENSE1+ SENSE2+ BOOST1 BOOST2 0.1μF 15k 0.1μF 0.1μF 0.1μF 3.57k L1 0.56μH VOUT1 1.2V 15A TG1 MT1 + MT2 DB2 SW1 L2 0.56μH VOUT2 1.5V 15A SW2 DRVCC1 INTVCC COUT2 330μF w2 3.57k TG2 DB1 2.2Ω COUT1 100μF w2 15k DRVCC2 EXTVCC COUT4 + 330μF w2 4.7μF 1μF BG1 MB1 BG2 MB2 COUT3 100μF w2 PGND 10k VOUTSENSE1+ 15k VFB2 10k 100k PGOOD1 0.
LTC3838 TYPICAL APPLICATIONS VIN 6V TO 26V + CIN1 220μF CIN2 10μF w3 2.2Ω LTC3838 1μF VIN 100Ω SENSE1– SENSE2– SENSE1+ SENSE2+ 100Ω 1nF 100Ω 1nF 0.1μF BOOST1 RS1 0.002Ω VOUT1 1.2V 12A L1 0.47μH MT1 + COUT2 330μF w2 BOOST2 TG1 MT2 TG2 DB1 DB2 SW1 2.2Ω COUT1 100μF w2 100Ω 0.1μF DRVCC2 EXTVCC 4.7μF MB1 BG1 MB2 BG2 PGND 10k VOUTSENSE1+ 0.01μF 39.2k 60.
LTC3838 TYPICAL APPLICATIONS VIN 4.5V TO 14V + CIN2 22μF w4 CIN1 180μF 2.2Ω LTC3838 1μF VIN SENSE1– SENSE2– SENSE1+ SENSE2+ 0.1μF 0.1μF 0.1μF 0.1μF BOOST1 2.55k L1 0.36μH VOUT 1.2V 50A MT1 + COUT2 330μF w2 2.55k MT2 TG2 DB1 L2 0.36μH DB2 SW1 2.2Ω COUT1 100μF w2 BOOST2 TG1 SW2 DRVCC1 INTVCC DRVCC2 EXTVCC COUT3 + 330μF w2 4.7μF 1μF MB1 BG1 MB2 BG2 COUT4 100μF w2 PGND 10k VOUTSENSE1+ VFB2 10k VOUTSENSE1– 100k PGOOD 0.01μF PGOOD2 TRACK/SS1 TRACK/SS2 47pF 41.
LTC3838 TYPICAL APPLICATIONS VIN 6.5V TO 34V + CIN2 10μF w3 CIN1 220μF 2.2Ω LTC3838 1μF VIN 20Ω SENSE1– SENSE2– SENSE1+ SENSE2+ BOOST1 BOOST2 20Ω 1nF 20Ω 1nF 0.1μF 0.1μF RS1 0.002Ω VOUT1 5V 12A L1 2.2μH MT1 TG1 + COUT2 150μF w2 MT2 TG2 DB1 DB2 SW1 2.2Ω COUT1 100μF 20Ω L2 1.3μH DRVCC1 INTVCC DRVCC2 EXTVCC VOUT1 COUT3 330μF 4.7μF 1μF MB1 RS2 0.002Ω VOUT2 3.3V 12A SW2 BG1 + COUT4 100μF MB2 BG2 PGND 73.2k VOUTSENSE1+ 45.
LTC3838 TYPICAL APPLICATIONS VIN 7V TO 14V + CIN1 39μF CIN2 10μF w3 2.2Ω LTC3838 1μF VIN 10Ω SENSE1– SENSE2– SENSE1+ SENSE2+ 10Ω 1nF 10Ω 1nF 0.1μF BOOST1 VOUT1 5V 5A RS1 0.008Ω L1 0.8μH MT1 BOOST2 TG1 MT2 TG2 DB1 L2 0.8μH DB2 SW1 2.2Ω COUT1 47μF w2 10Ω 0.1μF SW2 DRVCC1 INTVCC DRVCC2 EXTVCC MB1 BG1 MB2 BG2 VOUT2 3.3V 5A COUT2 47μF w2 VOUT1 4.7μF 1μF RS2 0.008Ω PGND 73.2k 330pF 18.7k ITH1 ITH2 DTR1 VRNG1 RT SGND RUN1 100 2.0 POWER LOSS 0.
LTC3838 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UHF Package 38-Lead Plastic QFN (5mm × 7mm) (Reference LTC DWG # 05-08-1701 Rev C) 0.70 p 0.05 5.50 p 0.05 5.15 ± 0.05 4.10 p 0.05 3.00 REF 3.15 ± 0.05 PACKAGE OUTLINE 0.25 p 0.05 0.50 BSC 5.5 REF 6.10 p 0.05 7.50 p 0.05 RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 p 0.10 0.75 p 0.05 PIN 1 NOTCH R = 0.30 TYP OR 0.35 s 45o CHAMFER 3.
LTC3838 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. FE Package 38-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1772 Rev C) Exposed Pad Variation AA 4.75 REF 38 9.60 – 9.80* (.378 – .386) 4.75 REF (.187) 20 6.60 ±0.10 2.74 REF 4.50 REF SEE NOTE 4 6.40 2.74 REF (.252) (.108) BSC 0.315 ±0.05 1.05 ±0.10 0.50 BSC RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.50 – 0.75 (.020 – .
LTC3838 REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 6/12 Electrical specs clarification, 4.6V EXTVCC switch over 3, 4, 5, 13 3838fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3838 TYPICAL APPLICATION 4.5V to 26V Input, 2.5V/4A and 1.8V/4A Dual Output, 1MHz, RSENSE, Dual Channel Power FETs, Step-Down Converter VIN 4.5V TO 26V + CIN1 47μF CIN2 10μF w3 2.2Ω LTC3838 1μF VIN 20Ω 20Ω SENSE1– SENSE2– SENSE1+ SENSE2+ 1nF 20Ω 1nF 0.1μF BOOST1 M1 VOUT1 2.5V 4A RS1 0.006Ω BOOST2 TG1 L1 1.2μH M2 TG2 DB1 L2 1.2μH DB2 SW1 2.2Ω SW2 DRVCC1 INTVCC COUT1 100μF w2 20Ω 0.1μF DRVCC2 EXTVCC BG1 VOUT2 1.8V 4A COUT2 100μF w2 4.7μF 1μF RS2 0.006Ω BG2 PGND 31.
