Datasheet

LTC3838-1
5
38381f
For more information www.linear.com3838-1
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The junction temperature (T
J
, in °C) is calculated from the ambient
temperature (T
A
, in °C) and power dissipation (P
D
, in Watts) according to
the formula:
T
J
= T
A
+ (P
D
• θ
JA
)
where θ
JA
(in °C/W) is the package thermal impedance.
Note 3: The LTC3838-1 is tested under pulsed load conditions such that T
J
≈ T
A
. The LTC3838E-1 is guaranteed to meet specifications over the 0°C to
85°C operating junction temperature range. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with
statistical process controls. The
LTC3838I-1 is guaranteed to meet specifications over the –40°C to 125°C
operating junction temperature range . Note that the maximum ambient
temperature consistent with these specifications is determined by specific
operating conditions in conjunction with board layout, the rated package
thermal impedance and other environmental factors.
Note 4: This IC includes overtemperature protection that is intended to
protect the device during momentary overload
conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device.
Note 5: The LTC3838-1 is tested in a feedback loop that adjusts voltages
on the V
OUTSENSE1
+
and V
DFB2
+
pins to achieve specified error amplifier
output voltages (ITH1,2).
In order to simplify
the total system error computation, the regulated
voltage is defined in one combined specification which includes the effects
of line, load and common mode variation. The combined regulated voltage
specification is tested by independently varying line, load, and common
mode, which by design do not significantly affect one another. For any
combination of line, load, and common mode variation, the regulated
voltage should be within the limits
specified that are tested in production
to the following conditions:
Line: V
IN
= 4.5V to 38V, ITH = 1.2V, V
OUTSENSE1
–
= 0V, V
DFB2
–
= 0V
Load: V
IN
= 15V, ITH = 0.5V to 1.9V, V
OUTSENSE1
–
= 0V, V
DFB2
–
= 0V
Common Mode: V
IN
= 15V, ITH = 1.2V, V
OUTSENSE1
–
= ±0.5V, ±0.2V,
V
DFB2
–
= ±0.2V
Note 6: Delay times are measured with top gate (TG) and bottom gate
(BG) driving
minimum load, and using 50% levels.