Datasheet

LTC3838-1
4
38381f
For more information www.linear.com/3838-1
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 15V unless otherwise noted (Note 3).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Start-Up and Shutdown
V
RUN1,2
RUN Pin On Threshold V
RUN1,2
Rising
l
1.1 1.2 1.3 V
RUN Pin On Hysteresis V
RUN1,2
Falling from On Threshold 100 mV
I
RUN1,2
RUN Pin Pull-Up Current When Off RUN1,2 = SGND 1.2 µA
RUN Pin Pull-Up Current Hysteresis I
RUN1,2(HYS)
= I
RUN1,2(ON)
– I
RUN1,2(OFF)
5 µA
UVLO INTV
CC
Undervoltage Lockout INTV
CC
Falling
INTV
CC
Rising
l
l
3.3 3.7
4.2
4.5
V
V
I
TRACK/SS1,2
Soft-Start Pull-Up Current 0V < TRACK/SS1,2 < 0.6V 1 µA
Frequency and Clock Synchronization
f Clock Output Frequency
(Steady-State Switching Frequency)
R
T
= 205k
R
T
= 80.6k
R
T
= 18.2k
450
200
500
2000
550
kHz
kHz
kHz
Channel 2 Phase (Relative to Channel 1) PHASMD = SGND
PHASMD = Floating
PHASMD = INTV
CC
180
180
240
Deg
Deg
Deg
CLKOUT Phase (Relative to Channel 1) PHASMD = SGND
PHASMD = Floating
PHASMD = INTV
CC
60
90
120
Deg
Deg
Deg
V
PLLIN(H)
Clock Input High Level Into MODE/PLLIN 2 V
V
PLLIN(L)
Clock Input Low Level Into MODE/PLLIN 0.5 V
R
MODE/PLLIN
MODE/PLLIN Input DC Resistance With Respect to SGND 600
Gate Drivers
R
TG(UP)1,2
TG Driver Pull-Up On Resistance TG High 2.5 Ω
R
TG(DOWN)1,2
TG Driver Pull-Down On Resistance TG Low 1.2 Ω
R
BG(UP)1,2
BG Driver Pull-Up On Resistance BG High 2.5 Ω
R
BG(DOWN)1,2
BG Driver Pull-Down On Resistance BG Low 0.8 Ω
t
D(TG/BG)1,2
Top Gate Off to Bottom Gate On Delay Time (Note 6) 20 ns
t
D(BG/TG)1,2
Bottom Gate Off to Top Gate On Delay Time (Note 6) 15 ns
Internal V
CC
Regulator
V
DRVCC1
Internally Regulated DRV
CC1
Voltage 6V < V
IN
< 38V 5.0 5.3 5.6 V
DRV
CC1
Load Regulation I
DRVCC1
= 0mA to –100mA –1.5 –3 %
V
EXTVCC
EXTV
CC
Switchover Voltage EXTV
CC
Rising 4.4 4.6 4.8 V
EXTV
CC
Switchover Hysteresis 200 mV
EXTV
CC
to DRV
CC2
Voltage Drop V
EXTVCC
= 5V, I
DRVCC2
= –100mA 200 mV
PGood Output
OV PGOOD Overvoltage Threshold V
FB1,2
Rising from Regulated Voltage 5 7.5 10 %
UV PGOOD Undervoltage Threshold V
FB1,2
Falling from Regulated Voltage –5 –7.5 –10 %
PGOOD Threshold Hysteresis V
FB1,2
Returning to Regulated Voltage 2.5 %
V
PGOOD(L)1,2
PGOOD Low Voltage I
PGOOD
= 2mA 0.1 0.3 V
t
D(PGOOD)1,2
Delay from V
FB
Fault (OV/UV) to PGOOD Falling
Delay from V
FB
Good (OV/UV Cleared) to PGOOD
Rising
50
20
µs
µs