Datasheet

LTC3838-1
19
38381f
For more information www.linear.com3838-1
APPLICATIONS INFORMATION
The LTC3838-1 allows for seamless differential output
sensing by sensing the resistively divided feedback voltage
differentially. This allows for differential sensing in the full
output range from 0.6V to 5.5V. Channel 1’s difference
amplifier (DIFFAMP) has a bandwidth of around 8MHz,
and channel 2’s feedback amplifier has a bandwidth of
around 4MHz, both high enough so as to not affect main
loop compensation and
transient behavior.
To avoid noise coupling into the feedback voltages, the
resistor dividers should be placed close to the V
OUTSENSE1
+
and V
OUTSENSE1
, or V
DFB2
+
and V
DFB2
pins. Remote
output and ground traces should be routed together
as a differential pair to the remote output. For best ac-
curacy, these traces to the remote output and ground
should be connected as close
as possible to the desired
regulation point.
Switching Frequency Programming
The choice of operating frequency is a trade-off between
efficiency and component size. Lowering the operating fre-
quency improves efficiency by reducing MOSFET switching
losses but requires larger inductance and/or capacitance
to maintain low output ripple voltage. Conversely, raising
the operating frequency degrades efficiency but reduces
component size.
R
FB1
M
B
R
FB2
M
T
L
C
IN
V
IN
C
OUT
38381 F02
I
LOAD
OTHER CURRENTS
FLOWING IN
SHARED GROUND
PLANE
POWER TRACE
PARASITICS
±V
DROP(PWR)
+
GROUND TRACE
PARASITICS
±V
DROP(GND)
I
LOAD
LTC3838-1
V
OUTSENSE1
+
V
OUTSENSE1
Figure 2. Differential Output Sensing Used to Correct Line Loss Variations
in a High Power Distributed System with a Shared Ground Plane
The switching frequency of the LTC3838-1 can be pro-
grammed from 200kHz to 2MHz by connecting a resistor
from the RT pin to signal ground. The value of this resistor
can be chosen according to the following formula:
R
T
k
[ ]
=
41550
f kHz
[ ]
2.2
The overall controller system, including the clock PLL
and switching channels, has a synchronization range of
no less than ±30% around this programmed frequency.
Therefore, during external clock synchronization be sure
that the external clock frequency is within this ±30% range
of the RT programmed frequency. It is advisable that the
RT programmed frequency be equal the external clock
for maximum synchronization margin. Refer to the Phase
and Frequency
Synchronization section for more details.
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use of
smaller inductor and capacitor values. A higher frequency
generally results in lower efficiency because of MOSFET
gate charge losses. In addition to this basic trade-off, the
effect of inductor value on ripple current and low current
operation must also be considered
.